參數(shù)資料
型號: HM628512BI
廠商: Hitachi,Ltd.
英文描述: 4 M SRAM (512-kword ×8-bit)(4M靜態(tài)RAM (512k字 ×8位))
中文描述: 四米的SRAM(512 - KWord的× 8位)(4分靜態(tài)隨機(jī)存儲器(為512k字× 8位))
文件頁數(shù): 5/15頁
文件大?。?/td> 86K
代理商: HM628512BI
HM628512BI Series
5
Capacitance (Ta = +25
°
C, f = 1 MHz)
Note:
1.This parameter is sampled and not 100% tested.
AC Characteristics (Ta =
–40 to +85
°
C, V
CC
= 5 V
±
10%, unless otherwise noted.)
Test Conditions
Input pulse levels: 0.5 V to 2.5 V
Input rise and fall time: 5 ns
Input and output timing reference levels: 1.5 V
Output load:1 TTL Gate + C
L
(100 pF) (Including scope and jig)
Read Cycle
Parameter
Input capacitance*
1
Input/output capacitance*
1
Symbol
Cin
C
I/O
Typ
Max
8
10
Unit
pF
pF
Test conditions
Vin = 0 V
V
I/O
= 0 V
HM628512BI
-7
Min
70
10
5
0
0
10
-8
Min
85
10
5
0
0
10
Parameter
Read cycle time
Address access time
Chip select access time
Output enable to output valid
Chip selection to output in low-Z
Output enable to output in low-Z
Chip deselection to output in high-Z
Output disable to output in high-Z
Output hold from address change
Symbol
t
RC
t
AA
t
CO
t
OE
t
LZ
t
OLZ
t
HZ
t
OHZ
t
OH
Max
70
70
35
25
25
Max
85
85
45
30
30
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
2
2
1, 2
1, 2
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