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參數(shù)資料
| 型號： | HM628127HB |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 1 M High Speed SRAM (128-kword ×8-bit)(1 M 高速 SRAM (128k字 ×8位)) |
| 中文描述： | 高1米高速SRAM（128 KWord的× 8位）（1米高速靜態(tài)存儲器（128K的字× 8位）） |
| 文件頁數(shù)： | 7/14頁 |
| 文件大小： | 94K |
| 代理商： | HM628127HB |
HM628127HB Series
7
Write Cycle
HM628127HB-15
HM628127HB-20
Parameter
Symbol Min
Max
Min
Max
Unit
Notes
Write cycle time
t
WC
t
AW
t
CW
t
WP
t
AS
t
WR
t
DW
t
DH
t
OW
t
OHZ
t
WHZ
15
—
20
—
ns
Address valid to end of write
12
—
15
—
ns
Chip select to end of write
10
—
12
—
ns
9
Write pulse width
10
—
12
—
ns
8
Address setup time
0
—
0
—
ns
6
Write recovery time
0
—
0
—
ns
7
Data to write time overlap
8
—
10
—
ns
Data hold from write time
0
—
0
—
ns
Write disable to output in low-Z
3
—
3
—
ns
1
Output disable to output in high-Z
—
7
—
7
ns
1
Write enable to output in high-Z
Note: 1. Transition is measured
±
200 mV from steady voltage with Load (B). This parameter is sampled
and not 100% tested.
2. Address should be valid prior to or coincident with
CS
transition low.
3.
WE
and/or
CS
must be high during address transition time.
4. if
CS
and
OE
are low during this period, I/O pins are in the output state. Then, the data input
signals of opposite phase to the outputs must not be applied to them.
5. If the
CS
low transition occurs simultaneously with the
WE
low transition or after the
WE
transition, output remains a high impedance state.
6. t
AS
is measured from the latest address transition to the later of
CS
or
WE
going low.
7. t
WR
is measured from the earlier of
CS
or
WE
going high to the first address transition.
8. A write occurs during the overlap of a low
CS
and a low
WE
. A write begins at the latest
transition among
CS
going low and
WE
going low. A write ends at the earliest transition among
CS
going high and
WE
going high. t
WP
is measured from the beginning of write to the end of
write.
9. t
CW
is measured from the later of
CS
going low to the end of write.
—
7
—
7
ns
1
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| HM628128ALFP-10L | 131,072-word X 8-bit High Speed CMOS Static RAM |
| HM628128ALFP-10SL | 131,072-word X 8-bit High Speed CMOS Static RAM |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HM628127HBJP-15 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| HM628127HBJP-20 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| HM628127HBLJP-15 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| HM628127HBLJP-20 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| HM628127HBLJPI-20 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
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