參數(shù)資料
型號(hào): HM624100HC
廠商: Hitachi,Ltd.
英文描述: Dual J-K Negative-Edge-Triggered Flip-Flops With Preset And Clear 16-CDIP -55 to 125
中文描述: 4分高速SRAM(1 - Mword × 4位)
文件頁(yè)數(shù): 7/14頁(yè)
文件大?。?/td> 65K
代理商: HM624100HC
HM624100HC Series
7
AC Characteristics
(Ta = 0 to +70°C, V
CC
= 5.0 V ± 10 %, unless otherwise noted.)
Test Conditions
Input pulse levels: 3.0 V/0.0 V
Input rise and fall time: 3 ns
Input and output timing reference levels: 1.5 V
Output load: See figures (Including scope and jig)
Dout
255
480
5 V
5 pF
Output load (B)
(for t
CLZ
, t
OLZ
, t
CHZ
, t
OHZ
, t
WHZ
, and t
OW
)
Output load (A)
1.5 V
30 pF
Dout
RL=50
Zo=50
Read Cycle
HM624100HC
-10
Parameter
Symbol
Min
Max
Unit
Notes
Read cycle time
t
RC
t
AA
t
ACS
t
OE
t
OH
t
CLZ
t
OLZ
t
CHZ
t
OHZ
10
ns
Address access time
10
ns
Chip select access time
10
ns
Output enable to outpput valid
5
ns
Output hold from address change
3
ns
Chip select to output in low-Z
3
ns
1
Output enable to output in low-Z
0
ns
1
Chip deselect to output in high-Z
5
ns
1
Output disable to output in high-Z
5
ns
1
相關(guān)PDF資料
PDF描述
HM624100HJP-10 4M High Speed SRAM (1-Mword x 4-bit)
HM624100HJP-12 SMT CAPACITOR - 0.1 UF, 50 VOLT, 20%
HM624100HJP-15 4M High Speed SRAM (1-Mword x 4-bit)
HM624100H Dual J-K Negative-Edge-Triggered Flip-Flops With Preset And Clear 16-CFP -55 to 125
HM624100HLJP-10 4M High Speed SRAM (1-Mword x 4-bit)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HM624100HCJP-10 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4M High Speed SRAM (1-Mword x 4-bit)
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HM624100HCLJP-10 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4M High Speed SRAM (1-Mword x 4-bit)
HM624100HCLJP-12 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SRAM: Notes on Usage Technical Update/Device
HM624100HJP-10 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4M High Speed SRAM (1-Mword x 4-bit)