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參數(shù)資料
| 型號： | HM18TS402 |
| 廠商： | HYNIX SEMICONDUCTOR INC |
| 元件分類： | 顯示驅動器 |
| 英文描述： | LIQUID CRYSTAL DISPLAY DRIVER, UUC544 |
| 文件頁數(shù)： | 5/24頁 |
| 文件大?。?/td> | 219K |
| 代理商： | HM18TS402 |
HM18TS402
- 5 -
Preliminary
PS1
I
Power Save
Power saving mode(1)
PS1= “H” : Normal operation
PS1= “L” : Turn off the OP AMP
PS2
I
Power Save
Power saving mode(2)
PS2= “H” : Normal operation
PS2= “L” : Turn off the bias circuit of OP AMP
TESTB1/2
I
Test pin
In normal operation, these terminals are tied to DVDD
V0 ~ 4
I
γ
- Correction
Voltage
Reference voltage for
γ
correction of DAC circuit.
VSS
≤
V0
≤
V1
≤
V2
≤
V3
≤
V4
≤
AVDD
VSS
≤
V4
≤
V3
≤
V2
≤
V1
≤
V0
≤
AVDD
LOAD
I
Load Pulse
LOAD pulse transfers the data from sampling register to hold register.
The transfer happens after loading the 6bit data into sampling register for all
corresponding channels. Then output buffer outputs analog voltage
corresponding to data as soon.
XIN0~5
YIN0~5
ZIN0~5
I
Data Input
Data inputs consist of 6-bit words for three each channels (18bits) for color
input data.
At the rising edge of CPH, each 6-bit data for three adjacent channels
are loaded in parallel.
Control the data bus width ( select the display mode )
Control the valid data bit number , then decide the valid color number of
display.
If GS1=GS2=1, V0 and V4 is disconnected from Gamma correction resistor
ladder, so there is no current in resistor ladder.
Setting
GS1
GS2
Valid bus
number
Gray scale
number
Color
number
0
0
6 bit
64 gray-scale
262,144
0
1
4bit
16 gray-scale
4,096
1
0
3bit
8 gray-scale
512
1
1
1bit
2 gray-scale
8
GS1/GS2
I
Data width pin
AVDD
I
Analog Power
Power supply for analog block.
DVDD
I
Digital Power
Power supply for digital block.
AVSS
I
Analog GND
Analog circuit ground.
DVSS
I
Digital GND
Digital circuit ground.
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