參數(shù)資料
型號(hào)： HM18TS402
廠商： HYNIX SEMICONDUCTOR INC
元件分類： 顯示驅(qū)動(dòng)器
英文描述： LIQUID CRYSTAL DISPLAY DRIVER, UUC544
文件頁(yè)數(shù)： 4/24頁(yè)
文件大?。?/td> 219K
代理商： HM18TS402
HM18TS402
4. TERMINAL FUNCTIONS
- 4 -
Preliminary
Terminal
Name
I/O
FUNCTION
X01 ~ X134
Y01 ~ Y134
Z01 ~ Z134
O
LCD Panel
Drive
LCD panel driving terminal.
DI/O
DO/I
I/O
Chip Enable
Data enable terminal.
Input for the start of data transfer and output for the end of data transfer.
U/D terminal controls as followings.
U/D = “H”, DI/O : input
DO/I : output
U/D = “L”, DO/I : input
DI/O : output
Case of input: If “H” is received on the rising edge of CPH, the internal
circuits come into data receivable status from stand-by status. Data input
starts to enter from next rising edge of CPH in sequence.
Case of output: Output gives Enable signal to next stage driver. After
making “H” level, the internal circuits comes into stand-by status.
U/D
I
Shift Direction
U/D controls the direction in which the data is loaded into the input
register.
U/D = “H”, X01~Z01,X02~Z02,X03~Z03……
U/D = “L”, X134~Z134,X133~Z133,X132~Z132……
This terminal uses DC level as “H” or “L” level
CPH
I
Clock
The clock synchronizes the 18-bit (three 6-bit channels) data sampling, and
synchronizes the internal control logic of the HM18TS402. All data are
loaded and moved on at rising edge of CPH.
POL
I
Data Polarity
Data polarity switching terminal
POL= “H” : Reverse data
POL= “L” : Non-reverse data
Data bus and this signal are operated and the result is obtained
synchronously at the CPH rising edge.
IX
I
Bias
Controls the bias current.
If IX voltage increases, the amp bias current also increases, and if IX
voltage decreases, then the amp bias current also decreases.
In the production, this terminal is inhibited.
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