173
TM
March 1997
HM-6516/883
2K x 8 CMOS RAM
Features
This Circuit is Processed in Accordance to MIL-STD-
883 and is Fully Conformant Under the Provisions of
Paragraph 1.2.1.
Low Power Standby. . . . . . . . . . . . . . . . . . . 275
μ
W Max
Low Power Operation . . . . . . . . . . . . . .55mW/MHz Max
Fast Access Time . . . . . . . . . . . . . . . . . 120/200ns Max
Industry Standard Pinout
Single Supply. . . . . . . . . . . . . . . . . . . . . . . . . . 5.0V VCC
TTL Compatible
Static Memory Cells
High Output Drive
On-Chip Address Latches
Easy Microprocessor Interfacing
Description
The HM-6516/883 is a CMOS 2048 x 8 Static Random
Access Memory. Extremely low power operation is achieved
by the use of complementary MOS design techniques. This
low power is further enhanced by the use of synchronous cir-
cuit techniques that keep the active (operating) power low,
which also gives fast access times. The pinout of the HM-
6516/883 is the popular 24 pin, 8-bit wide JEDEC Standard
which allows easy memory board layouts, flexible enough to
accommodate a variety of PROMs, RAMS, EPROMs, and
ROMs.
The HM-6516/883 is ideally suited for use in microprocessor
based systems. The byte wide organization simplifies the
memory array design, and keeps operating power down to a
minimum because only one device is enabled at a time. The
address latches allow very simple interfacing to recent gen-
eration microprocessors which employ a multiplexed
address/data bus. The convenient output enable control also
simplifies multiplexed bus interfacing by allowing the data
outputs to be controlled independent of the chip enable.
Ordering Information
Pinouts
120ns
200ns
TEMPERATURE RANGE
-55
o
C to 125
o
C
-55
o
C to +125
o
C
PACKAGE
PKG. NO.
HM1-6516B/883
HM1-6516/883
CERDIP
F24.6
HM4-6516B/883
-
CLCC
J32.A
HM-6516/883
(CERDIP)
TOP VIEW
HM-6516/883
(CLCC)
TOP VIEW
1
2
3
4
5
6
7
8
9
10
11
12
16
15
14
13
17
18
19
20
21
22
23
24
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
GND
VCC
A8
A9
W
G
A10
E
DQ7
DQ6
DQ5
DQ4
DQ3
5
6
7
8
11
10
9
13
12
27
28
29
26
25
24
23
22
21
3
2
1
4
32
31
30
16
G
17
N
18
D
19
D
20
D
14 15
D
A6
A5
A4
A3
A2
A1
A0
NC
DQ0
D
V
N
N
A
N
N
N
A8
A9
NC
G
A10
E
DQ7
DQ6
W
PIN
DESCRIPTION
NC
No Connect
A0 - A10
Address Inputs
E
Chip Enable/Power Down
VSS/GND
Ground
DQ0 - DQ7 Data In/Data Out
VCC
Power (+5V)
W
Write Enable
G
Output Enable
FN2999.1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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