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參數(shù)資料
| 型號： | HM-6617883 |
| 廠商： | Intersil Corporation |
| 英文描述： | 2K x 8 CMOS PROM |
| 中文描述： | 2K × 8的CMOS胎膜早破 |
| 文件頁數(shù)： | 1/7頁 |
| 文件大?。?/td> | 91K |
| 代理商： | HM-6617883 |
6-250
March 1997
HM-6617/883
2K x 8 CMOS PROM
Features
This Circuit is Processed in Accordance to MIL-STD-
883 and is Fully Conformant Under the Provisions of
Paragraph 1.2.1.
Low Power Standby and Operating Power
- ICCSB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100
μ
A
- ICCOP . . . . . . . . . . . . . . . . . . . . . . . . . .20mA at 1MHz
Fast Access Time. . . . . . . . . . . . . . . . . . . . . . . 90/120ns
Industry Standard Pinout
Single 5.0V Supply
CMOS/TTL Compatible Inputs
High Output Drive . . . . . . . . . . . . . . . . 12 LSTTL Loads
Synchronous Operation
On-Chip Address Latches
Separate Output Enable
Operating Temperature Range . . . . . . -55
o
C to +125
o
C
Description
The HM-6617/883 is a 16,384-bit fuse link CMOS PROM in
a 2K word by 8-bit/word format with “Three-State” outputs.
This PROM is available in the standard 0.600 inch wide 24
pin SBDIP, the 0.300 inch wide slim SBDIP, and the JEDEC
standard 32 pad CLCC.
The HM-6617/883 utilizes a synchronous design technique.
This includes on-chip address latches and a separate output
enable control which makes this device ideal for applications
utilizing recent generation microprocessors. This design
technique, combined with the Intersil advanced self-aligned
silicon gate CMOS process technology offers ultra-low
standby current. Low ICCSB is ideal for battery applications
or other systems with low power requirements.
The Intersil NiCr fuse link technology is utilized on this and
other Intersil CMOS PROMs. This gives the user a PROM
with permanent, stable storage characteristics over the full
industrial and military temperature voltage ranges. NiCr fuse
technology combined with the low power characteristics of
CMOS provides an excellent alternative to standard bipolar
PROMs or NMOS EPROMs.
All bits are manufactured storing a logical “0” and can be
selectively programmed for a logical “1” at any bit location.
Ordering Information
PACKAGE
TEMPERATURE RANGE
-55
o
C to +125
o
C
-55
o
C to +125
o
C
-55
o
C to +125
o
C
90ns
120ns
PACKAGE NO.
SBDIP
HM1-6617B/883
HM1-6617B/883
D24.6
SLIM SBDIP
HM6-6617B/883
HM6-6617B/883
D24.3
CLCC
HM4-6617B/883
HM4-6617B/883
J32.A
Pinouts
HM-6617/883 (SBDIP)
TOP VIEW
HM-6617/883 (CLCC)
TOP VIEW
1
2
3
4
5
6
7
8
9
10
11
12
16
17
18
19
20
21
22
23
24
15
14
13
A7
A6
A5
A4
A3
A2
A1
A0
Q0
Q1
Q2
GND
V
CC
A8
A9
P
G
A10
Q7
Q5
Q4
Q3
E
Q6
5
6
7
8
11
10
9
13
12
27
28
29
26
25
24
23
22
21
3
2
1
4
32 31 30
16 17 18 19 20
G
14 15
Q
A6
A5
A4
A3
A2
A1
A0
NC
Q0
Q
N
Q
Q
Q
V
C
N
N
A
N
N
N
A8
A9
NC
G
A10
E
Q7
Q6
P
PIN DESCRIPTION
PIN
DESCRIPTION
NC
No Connect
A0-A10
Address Inputs
E
Chip Enable
Q
Data Output
V
CC
Power (+5V)
G
Output Enable
P (Note)
Program Enable
NOTE: P should be hardwired to V
CC
except during programming.
File Number
3016.1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
|
Copyright
Intersil Corporation 1999
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