- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄384423 > HIP9011ABZ (INTERSIL CORP) Engine Knock Signal Processor PDF資料下載
參數(shù)資料
| 型號： | HIP9011ABZ |
| 廠商： | INTERSIL CORP |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | Engine Knock Signal Processor |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDSO20 |
| 封裝： | LEAD FREEE, PLASTIC, MS-013-AC, SOIC-20 |
| 文件頁數(shù)： | 5/11頁 |
| 文件大?。?/td> | 253K |
| 代理商： | HIP9011ABZ |
5
FN4367.2
January 6, 2006
Timing Diagrams
FIGURE 1. SPI TIMING
B7
B6
B5
B4
B3
B2
B1
B0
SI
SCK
CS
t
CSCH
t
CSCF
t
PWH
t
PWL
t
SCCH
t
SUH
t
HH
B6
INT/HOLD
t
CIH
B7
B5
B4
B3
B2
B1
B0
SO
t
CSH
TABLE 1. SPI TIMING REQUIREMENTS
SYMBOL
REQUIREMENT
TIME
t
CSCH
Minimum time from CS falling edge to SCK rising edge.
10ns
t
CSCF
Minimum time from CS falling edge to SCK falling edge.
80ns
t
PWL
Minimum time for the SCK low.
60ns
t
PWH
Minimum time for the SCK high.
60ns
t
SCCH
Minimum time from SCK falling after 8 bits to CS raising edge.
80ns
t
SUH
Minimum time from data high to falling edge of spiclk.
20ns
t
SUL
Minimum time from data low to falling edge of spiclk.
20ns
t
HH
Minimum time for data high after the falling edge of the spiclk.
10ns
t
HL
Minimum time for data low after the falling edge of the spiclk.
10ns
t
CIH
Minimum time after CS raises until INT/HOLD goes high.
8
μ
s
t
CSH
Minimum time between programming 2 internal registers.
200ns
INT/HOLD
INTOUT
t1
t2
t3
t4
FIGURE 2. INTEGRATOR TIMING
TABLE 2. INTEGRATE/HOLD TIMING REQUIREMENTS
SYMBOL
REQUIREMENT
TIME
t1
Maximum rise time of the INT/HOLD signal.
45ns
t2
Maximum time after INT/HOLD rises for INTOUT to begin to integrate.
20
μ
s
t3
Maximum fall time of INT/HOLD signal.
45ns
t4
Typical time after INT/HOLD goes low before chip goes into hold state.
20
μ
s
HIP9011
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HIP9011 | Engine Knock Signal Processor |
| HIP9011AB | Engine Knock Signal Processor |
| HIP9020 | Programmable Quad Buffer with Pre and Post Scaler Dividers |
| HIP9020AB | Programmable Quad Buffer with Pre and Post Scaler Dividers |
| HIP9020AP | Programmable Quad Buffer with Pre and Post Scaler Dividers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HIP9011ABZT | 功能描述:接口 - 專用 W/ANNEAL KNOCK SENSOR TAPE RoHS:否 制造商:Texas Instruments 產(chǎn)品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:BGA-59 |
| HIP9011ABZTR5133 | 制造商:Intersil Corporation 功能描述:PB-FREE VISTEON HIP9011ABZT W/BARCODE LABELS,PB DIE,ELECT SE - Tape and Reel 制造商:Intersil Corporation 功能描述:ITSHIP9011ABZTR5133 W/BARCODE LABELS,PB |
| HIP9011EVAL1Z | 功能描述:電源管理IC開發(fā)工具 HIP9011 EVAL BRD 1 ROHS CMPL RoHS:否 制造商:Maxim Integrated 產(chǎn)品:Evaluation Kits 類型:Battery Management 工具用于評估:MAX17710GB 輸入電壓: 輸出電壓:1.8 V |
| HIP9020 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Programmable Quad Buffer with Pre and Post Scaler Dividers |
| HIP9020AB | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。