參數(shù)資料
型號: HIP6503EVAL1
廠商: Intersil Corporation
元件分類: 基準電壓源/電流源
英文描述: Multiple Linear Power Controller with ACPI Control Interface
中文描述: 多重線性電源控制器ACPI控制接口
文件頁數(shù): 11/14頁
文件大?。?/td> 151K
代理商: HIP6503EVAL1
11
high-frequency decoupling capacitors should be placed as
close as possible to the load they are decoupling; the ones
decoupling the controller close to the controller pins, the
ones decoupling the load close to the load connector or the
load itself (if embedded). Even though bulk capacitance
(aluminum electrolytics or tantalum capacitors) placement is
not as critical as the high-frequency capacitor placement,
having these capacitors close to the load they serve is
preferable.
The critical small signal components include the soft-start
capacitor, C
SS
, as well as the memory selection resistor,
R
SEL
. Locate these components close to the respective pins
of the control IC, and connect them to ground through a via
placed close to the ground pad. Minimize any leakage
current paths from these nodes, since the internal current
sources are only 10s of microamperes (10
μ
A to 40
μ
A).
A multi-layer printed circuit board is recommended. Figure
10 shows the connections of most of the components in the
converter. Note that the individual capacitors shown each
could represent numerous physical capacitors. Dedicate one
solid layer for a ground plane and make all critical
component ground connections through vias placed as close
to the component terminal as possible. Dedicate another
solid layer as a power plane and break this plane into
smaller islands of common voltage levels. Ideally, the power
plane should support both the input power and output power
nodes. Use copper filled polygons on the top and bottom
circuit layers to create power islands connecting the filtering
components (output capacitors) and the loads. Use the
remaining printed circuit layers for small signal wiring.
Component Selection Guidelines
Output Capacitors Selection
The output capacitors for all outputs should be selected to
allow the output voltage to meet the dynamic regulation
requirements of active state operation (S0, S1). The load
transient for the various microprocessor system’s
components may require high quality capacitors to supply
the high slew rate (di/dt) current demands. Thus, it is
recommended that the output capacitors be selected for
transient load regulation, paying attention to their parasitic
components (ESR, ESL).
Also, during the transition between active and sleep states,
there is a short interval of time during which none of the
power pass elements are conducting - during this time the
output capacitors have to supply all the output current. The
output voltage drop during this brief period of time can be
easily approximated with the following formula:
, where
V
OUT
- output voltage drop
ESR
OUT
- output capacitor bank ESR
I
OUT
- output current during transition
C
OUT
- output capacitor bank capacitance
t
t
- active-to-sleep or sleep-to-active transition time (10
μ
s typ.)
The output voltage drop is heavily dependent on the ESR
(equivalent series resistance) of the output capacitor bank,
the choice of capacitors should be such as to maintain the
output voltage above the lowest allowable regulation level.
V
CLK
(V
OUT4
) Output Capacitors Selection
The output capacitor for the V
CLK
linear regulator provides
loop stability. Figure 11 outlines a capacitance vs. equivalent
series resistance envelope. For stable operation and
optimized performance, select a C
OUT4
capacitor or
combination of capacitors with characteristics within the
shown envelope.
L
V
OUT1
C
HF1
L
FIGURE 10. PRINTED CIRCUIT BOARD ISLANDS
V
OUT3
Q1
Q2
Q3
Q4
C
SS
+12V
IN
+5V
SB
C
IN
VIA CONNECTION TO GROUND PLANE
ISLAND ON POWER PLANE LAYER
ISLAND ON CIRCUIT/POWER PLANE LAYER
C
BULK2
HIP6503
1V8IN
C
12V
V
OUT2
V
OUT5
SS
GND
VSEN2
5VDLSB
DRV2
3V3DLSB
KEY
12V
5VSB
DLA
Q5
C
BULK5
L
C
5VSB
L
L
C
HF3
C
HF5
5VDL
+5V
IN
C
HF2
+3.3V
IN
3V3DL
5V
3V3
1V8SB
C
BULK4
C
HF4
C
BULK1
VCLK
C
BULK3
V
OUT
I
OUT
ESR
OUT
t
OUT
---------------
+
×
=
HIP6503
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