參數(shù)資料
型號(hào): HIP6018B
廠商: Intersil Corporation
英文描述: 100,000 System Gate FPGA - NOT RECOMMENDED for NEW DESIGN
中文描述: 先進(jìn)的雙PWM和線性功率控制
文件頁(yè)數(shù): 12/14頁(yè)
文件大小: 134K
代理商: HIP6018B
2-249
PWM Output Capacitors
Modern microprocessors produce transient load rates above
10A/ns. High frequency capacitors initially supply the transient
and slow the current load rate seen by the bulk capacitors.
The bulk filter capacitor values are generally determined by
the ESR (effective series resistance) and ESL (effective series
inductance) parameters rather than actual capacitance.
High frequency decoupling capacitors should be placed as
close to the power pins of the load as physically possible. Be
careful not to add inductance in the circuit board wiring that
could cancel the usefulness of these low inductance
components. Consult with the manufacturer of the load on
specific decoupling requirements.
Useonlyspecializedlow-ESRcapacitorsintendedforswitching
regulator applications for the bulk capacitors. The bulk
capacitor’s ESR determines the output ripple voltage and the
initial voltage drop after a high slew-rate transient. An aluminum
electrolytic capacitor’s ESR value is related to the case size
with lower ESR available in larger case sizes. However, the
equivalent series inductance of these capacitors increases with
case size and can reduce the usefulness of the capacitor to
high slew-rate transient loading. Unfortunately, ESL is not a
specified parameter. Work with your capacitor supplier and
measure the capacitor’s impedance with frequency to select
suitable components. In most cases, multiple electrolytic
capacitors of small case size perform better than a single large
casecapacitor.Foragiventransientloadmagnitude,theoutput
voltage transient response due to the output capacitor
characteristics can be approximated by the following equation:
Linear Output Capacitors
The output capacitors for the linear regulator and the linear
controller provide dynamic load current. The linear controller
uses dominant pole compensation integrated in the error
amplifier and is insensitive to output capacitor selection.
Capacitor, C
OUT3
should be selected for transient load
regulation.
The output capacitor for the linear regulator provides loop
stability. The linear regulator (OUT2) requires an output
capacitor characteristic shown in Figure 13. The upper line
plots the 45 phase margin with 150mA load and the lower
line is the 45 phase margin limit with a 10mA load. Select a
C
OUT2
capacitor with characteristic between the two limits.
Output Inductor Selection
The PWM converter requires an output inductor. The output
inductor is selected to meet the output voltage ripple
requirements and sets the converter’s response time to a
load transient. The inductor value determines the converter’s
ripple current and the ripple voltage is a function of the ripple
current. The ripple voltage and current are approximated by
the following equations:
Increasing the value of inductance reduces the ripple current
and voltage. However, the large inductance values reduce
the converter’s response time to a load transient.
One of the parameters limiting the converter’s response to a
load transient is the time required to change the inductor
current. Given a sufficiently fast control loop design, the
HIP6018B will provide either 0% or 100% duty cycle in
response to a load transient. The response time is the time
interval required to slew the inductor current from an initial
current value to the post-transient current level. During this
interval the difference between the inductor current and the
transient current level must be supplied by the output
capacitors. Minimizing the response time can minimize the
output capacitance required.
The response time to a transient is different for the
application of load and the removal of load. The following
equations give the approximate response time interval for
application and removal of a transient load:
where: I
TRAN
is the transient load current step, t
RISE
is the
response time to the application of load, and t
FALL
is the
response time to the removal of load. With a +5V input
source, the worst case response time can be either at the
application or removal of load, and dependent upon the
output voltage setting. Be sure to check both of these
equations at the minimum and maximum output levels for the
worst case response time.
Input Capacitor Selection
The important parameters for the bulk input capacitor are the
voltage rating and the RMS current rating. For reliable
operation, select the bulk capacitor with voltage and current
ratings above the maximum input voltage and largest RMS
current required by the circuit. The capacitor voltage rating
should be at least 1.25 times greater than the maximum
input voltage and a voltage rating of 1.5 times is a
conservative guideline.
V
TRAN
ESL
dI
--------------------
×
ESR
I
TRAN
×
+
=
10
1000
100
0.1
0.2
0.3
0.4
0.5
0.6
0.7
CAPACITANCE (
μ
F)
ESR (
)
FIGURE 13. C
OUT2
OUTPUT CAPACITOR
STABLE
I
V
-------------------------------
V
O
S
V
IN
---------------
×
=
V
OUT
I
ESR
×
=
t
RISE
L
IN
I
OUT
×
----------–
=
t
FALL
L
------------------------------
I
OUT
×
=
HIP6018B
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