參數(shù)資料
型號： HIP6004B
廠商： Intersil Corporation
英文描述： Buck and Synchronous-Rectifier (PWM) Controller and Output Voltage Monitor(脈沖帶寬調(diào)節(jié)控制和輸出電壓檢測電路)
中文描述： 巴克和同步整流（PWM）控制器和輸出電壓監(jiān)視器（脈沖帶寬調(diào)節(jié)控制和輸出電壓檢測電路）
文件頁數(shù)： 8/12頁
文件大?。?/td> 160K
代理商： HIP6004B
2-81
Figure 5 shows the critical power components of the converter.
To minimize the voltage overshoot the interconnecting wires
indicated by heavy lines should be part of ground or power
plane in a printed circuit board. The components shown in
Figure 5 should be located as close together as possible.
Please note that the capacitors C
IN
and C
O
each represent
numerous physical capacitors. Locate the HIP6004B within 3
inches of the MOSFETs, Q
1
and Q
2
. The circuit traces for the
MOSFETs’ gate and source connections from the HIP6004B
must be sized to handle up to 1A peak current.
Figure 6 shows the circuit traces that require additional
layout consideration. Use single point and ground plane
construction for the circuits shown. Minimize any leakage
current paths on the SS PIN and locate the capacitor, C
SS
close to the SS pin because the internal current source is
only 10
μ
A. Provide local V
CC
decoupling between V
CC
and
GND pins. Locate the capacitor, C
BOOT
as close as
practical to the BOOT and PHASE pins.
Feedback Compensation
Figure 7 highlights the voltage-mode control loop for a
synchronous-rectified buck converter. The output voltage
(V
OUT
) is regulated to the Reference voltage level. The
error amplifier (Error Amp) output (V
E/A
) is compared with
the oscillator (OSC) triangular wave to provide a pulse-
width modulated (PWM) wave with an amplitude of V
IN
at
the PHASE node.
The PWM wave is smoothed by the output filter (L
O
and C
O
).
The modulator transfer function is the small-signal transfer
function of V
OUT
/V
E/A
. This function is dominated by a DC
Gain and the output filter (L
O
and C
O
), with a double pole
break frequency at F
LC
and a zero at F
ESR
. The DC Gain
of the modulator is simply the input voltage (V
IN
) divided by
the peak-to-peak oscillator voltage
V
OSC
.
Modulator Break Frequency Equations
The compensation network consists of the error amplifier
(internal to the HIP6004B) and the impedance networks
Z
IN
and Z
FB
. The goal of the compensation network is to
provide a closed loop transfer function with the highest 0dB
crossing frequency (f
0dB
) and adequate phase margin.
Phase margin is the difference between the closed loop
phase at f
0dB
and 180 degrees
.
The equations below relate
the compensation network’s poles, zeros and gain to the
components (R
1
, R
2
, R
3
, C
1
, C
2
, and C
3
) in Figure 7. Use
these guidelines for locating the poles and zeros of the
compensation network:
1. Pick Gain (R
2
/R
1
) for desired converter bandwidth.
2. Place 1
ST
Zero Below Filter’s Double Pole (~75% F
LC
).
3. Place 2
ND
Zero at Filter’s Double Pole.
4. Place 1
ST
Pole at the ESR Zero.
5. Place 2
ND
Pole at Half the Switching Frequency.
6. Check Gain against Error Amplifier’s Open-Loop Gain.
7. Estimate Phase Margin - Repeat if Necessary.
PGND
L
O
C
O
LGATE
UGATE
PHASE
Q
1
Q
2
D
2
V
IN
V
OUT
RETURN
HIP6004B
C
IN
L
FIGURE 5. PRINTED CIRCUIT BOARD POWER AND GROUND
PLANES OR ISLANDS
FIGURE 6. PRINTED CIRCUIT BOARD SMALL SIGNAL
LAYOUT GUIDELINES
+12V
HIP6004B
SS
GND
V
CC
BOOT
D
1
L
O
C
O
V
OUT
L
Q
1
Q
2
PHASE
+V
IN
C
BOOT
C
VCC
C
SS
FIGURE 7. VOLTAGE-MODE BUCK CONVERTER
COMPENSATION DESIGN
V
OUT
REFERENCE
L
O
C
O
ESR
V
IN
V
OSC
ERROR
AMP
PWM
DRIVER
(PARASITIC)
Z
FB
+
-
DACOUT
R
1
R
3
R
2
C
3
C
2
C
1
COMP
V
OUT
FB
Z
FB
HIP6004B
Z
IN
COMPARATOR
DRIVER
DETAILED COMPENSATION COMPONENTS
PHASE
V
E/A
+
-
+
-
Z
IN
OSC
FLC
LOx CO
2
π
x
------------------------------------------
=
FESR
-------------------------------------------
=
HIP6004B
相關(guān)PDF資料
PDF描述
HIP6004 Buck and Synchronous-Rectifier (PWM) Controller and Output Voltage Monitor(脈沖帶寬調(diào)節(jié)控制和輸出電壓檢測電路)
HIP6004CB Buck and Synchronous-Rectifier (PWM) Controller and Output Voltage Monitor
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HIP6005B Buck Pulse-Width Modulator (PWM) Controller and Output Voltage Monitor
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HIP6004B_03 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Buck and Synchronous-Rectifier (PWM) Controller and Output Voltage Monitor
HIP6004BCB 功能描述:IC CTRLR PWM VOLTAGE MON 20-SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 專用型 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,000 系列:- 應(yīng)用:電源，ICERA E400，E450 輸入電壓:4.1 V ~ 5.5 V 輸出數(shù):10 輸出電壓:可編程 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:42-WFBGA，WLCSP 供應(yīng)商設(shè)備封裝:42-WLP 包裝:帶卷 (TR)
HIP6004BCB-T 功能描述:IC CTRLR PWM VOLTAGE MON 20-SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 專用型 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,000 系列:- 應(yīng)用:電源，ICERA E400，E450 輸入電壓:4.1 V ~ 5.5 V 輸出數(shù):10 輸出電壓:可編程 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:42-WFBGA，WLCSP 供應(yīng)商設(shè)備封裝:42-WLP 包裝:帶卷 (TR)
HIP6004BCBZ 功能描述:電壓模式 PWM 控制器 PWM CNTRLR 3 5 TO 1 3 DAC RNG 20LD RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:1 拓?fù)浣Y(jié)構(gòu):Buck 輸出電壓:34 V 輸出電流: 開關(guān)頻率: 工作電源電壓:4.5 V to 5.5 V 電源電流:600 uA 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝 / 箱體:WSON-8 封裝:Reel
HIP6004BCBZA 功能描述:電壓模式 PWM 控制器 W/ANNEAL PWM CNTRLR 3 5 TO 1 3 DAC RNG RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:1 拓?fù)浣Y(jié)構(gòu):Buck 輸出電壓:34 V 輸出電流: 開關(guān)頻率: 工作電源電壓:4.5 V to 5.5 V 電源電流:600 uA 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝 / 箱體:WSON-8 封裝:Reel
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