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參數(shù)資料
| 型號： | HIP6002 |
| 廠商： | Intersil Corporation |
| 英文描述： | Rectifier (PWM) Controller and Output Voltage Monitor(整流器PWM控制器和輸出電壓檢測器) |
| 中文描述： | 整流器（PWM）控制器和輸出電壓監(jiān)視器（整流器的PWM控制器和輸出電壓檢測器） |
| 文件頁數(shù)： | 8/12頁 |
| 文件大?。?/td> | 211K |
| 代理商： | HIP6002 |
8
Compensation Break Frequency Equations
1. Pick Gain (R2/R1) for desired converter bandwidth
2. Place 1
ST
Zero Below Filter’s Double Pole (~75% F
LC
)
3. Place 2
ND
Zero at Filter’s Double Pole
4. Place 1
ST
Pole at the ESR Zero
5. Place 2
ND
Pole at Half the Switching Frequency
6. Check Gain against Error Amplifier’s Open-Loop Gain
7. Estimate Phase Margin - Repeat if Necessary
Figure 9 shows an asymptotic plot of the DC-DC converter’s
gain vs frequency. The actual Modulator Gain has a high
gain peak due to the high Q factor of the output filter and is
not shown in Figure 9. Using the above guidelines should
give a Compensation Gain similar to the curve plotted. The
open loop error amplifier gain bounds the compensation gain.
Check the compensation gain at F
P2
with the capabilities of
the error amplifier. The Closed Loop Gain is constructed on
the log-log graph of Figure 9 by adding the Modulator Gain (in
dB) to the Compensation Gain (in dB). This is equivalent to
multiplying the modulator transfer function to the
compensation transfer function and plotting the gain.
The compensation gain uses external impedance networks
Z
FB
and Z
IN
to provide a stable, high bandwidth (BW) overall
loop. A stable control loop has a gain crossing with
-20dB/decade slope and a phase margin greater than 45
degrees. Include worst case component variations when
determining phase margin.
Component Selection Guidelines
Output Capacitor Selection
An output capacitor is required to filter the output and supply
the load transient current. The filtering requirements are a
function of the switching frequency and the ripple current.
The load transient requirements are a function of the slew
rate (di/dt) and the magnitude of the transient load current.
These requirements are generally met with a mix of
capacitors and careful layout.
Modern microprocessors produce transient load rates above
1A/ns. High frequency capacitors initially supply the
transient and slow the current load rate seen by the bulk
capacitors. The bulk filter capacitor values are generally
determined by the ESR (effective series resistance) and
voltage rating requirements rather than actual capacitance
requirements.
High frequency decoupling capacitors should be placed as
close to the power pins of the load as physically possible.
Be careful not to add inductance in the circuit board wiring
that could cancel the usefulness of these low inductance
components. Consult with the manufacturer of the load on
specific decoupling requirements. For example, Intel
recommends that the high frequency decoupling for the
Pentium Pro be composed of at least forty (40) 1
μ
F
ceramic capacitors in the 1206 surface-mount package.
Use only specialized low-ESR capacitors intended for
switching-regulator applications for the bulk capacitors. The
V
OUT
OSC
REFERENCE
L
O
C
O
ESR
V
IN
V
OSC
ERROR
AMP
PWM
DRIVER
(PARASITIC)
-
+
DACOUT
R1
R3
R2
C3
C2
C1
COMP
V
OUT
FB
Z
FB
HIP6002
Z
IN
COMPARATOR
DRIVER
DETAILED COMPENSATION COMPONENTS
PHASE
V
E/A
+
-
+
-
Z
IN
FIGURE 8. VOLTAGE - MODE BUCK CONVERTER
COMPENSATION DESIGN
Z
FB
F
Z1
----------------------------------
=
F
Z2
R3
)
C3
-------------------------+
=
F
P1
2
π
R2
--------+
------------------------------------------------------
=
F
P2
=
----------------------------------
100
80
60
40
20
0
-20
-40
-60
F
P1
F
Z2
10M
1M
100K
10K
1K
100
10
OPEN LOOP
ERROR AMP GAIN
F
Z1
20LOG
(R2/R1)
F
LC
F
ESR
COMPENSATION
GAIN
G
FREQUENCY (Hz)
20LOG
(V
IN
/
V
OSC
)
MODULATOR
GAIN
FIGURE 9. ASYMPTOTIC BODE PLOT OF CONVERTER GAIN
CLOSED LOOP
GAIN
F
P2
HIP6002
相關PDF資料 |
PDF描述 |
|---|---|
| HIP6002CB | Rectifier (PWM) Controller and Output Voltage Monitor |
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| HIP6004ACB | Buck and Synchronous-Rectifier (PWM) Controller and Output Voltage Monitor |
| HIP6004B | Buck and Synchronous-Rectifier (PWM) Controller and Output Voltage Monitor(脈沖帶寬調節(jié)控制和輸出電壓檢測電路) |
| HIP6004 | Buck and Synchronous-Rectifier (PWM) Controller and Output Voltage Monitor(脈沖帶寬調節(jié)控制和輸出電壓檢測電路) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| HIP6002CB | 制造商:Harris Corporation 功能描述: |
| HIP6002CB-T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Voltage-Mode SMPS Controller |
| HIP6003 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Buck Pulse-Width Modulator (PWM) Controller and Output Voltage Monitor |
| HIP6003CB | 制造商:Rochester Electronics LLC 功能描述:PWM CONTROLLER - 16 LEADS SOIC - Bulk |
| HIP6003CB-T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Voltage-Mode SMPS Controller |
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