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參數(shù)資料
| 型號： | HIP4084AP |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 功率晶體管 |
| 英文描述： | 40000 SYSTEM GATE LOGIC CELL ARRAY - NOT RECOMMENDED for NEW DESIGN |
| 中文描述： | 1.7 A 4 CHANNEL, FULL BRDG BASED MOSFET DRIVER, PDIP28 |
| 文件頁數(shù)： | 6/6頁 |
| 文件大?。?/td> | 639K |
| 代理商： | HIP4084AP |
6
HIP4084
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section
2.2 of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M
-
1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. In-
terlead flash and protrusions shall not exceed 0.25mm (0.010
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch)
10. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are not necessarily exact.
INDEX
AREA
E
D
N
1
2
3
-B-
0.25(0.010)
C A
M
B S
e
-A-
L
B
M
-C-
A1
A
SEATING PLANE
0.10(0.004)
h x 45
o
C
H
μ
α
0.25(0.010)
B
M
M
Small Outline Plastic Packages (SOIC)
M28.3
(JEDEC MS-013-AE ISSUE C
)
28 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
SYMBOL
INCHES
MILLIMETERS
NOTES
MIN
MAX
MIN
MAX
A
0.0926
0.1043
2.35
2.65
-
A1
0.0040
0.0118
0.10
0.30
-
B
0.013
0.0200
0.33
0.51
9
C
0.0091
0.0125
0.23
0.32
-
D
0.6969
0.7125
17.70
18.10
3
E
0.2914
0.2992
7.40
7.60
4
e
0.05 BSC
1.27 BSC
-
H
0.394
0.419
10.00
10.65
-
h
0.01
0.029
0.25
0.75
5
L
0.016
0.050
0.40
1.27
6
N
α
28
28
7
0
o
8
o
0
o
8
o
-
Rev. 0 12/93
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HIP4086 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:80V, 0.5A Three Phase Driver |
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