參數(shù)資料
型號： HIP4084
廠商： Intersil Corporation
英文描述： 40000 SYSTEM GATE LOGIC CELL ARRAY - NOT RECOMMENDED for NEW DESIGN
中文描述： 80V的，四相驅(qū)動0.50A
文件頁數(shù)： 3/6頁
文件大?。?/td> 639K
代理商： HIP4084
3
Absolute Maximum Ratings
T
A
= 25
o
C
Thermal Information
Supply Voltage, V
DD
. . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 16V
Logic I/O Voltages . . . . . . . . . . . . . . . . . . . . . . . -0.3V to V
DD
+0.3V
Voltage on xHS. . . . . . . . .-6V (Transient) to +85V (-40
o
C to 150
o
C)
Voltage on xHB. . . . . . . . . . . . . . . . . . . . .V
xHS
-0.3V to V
xHS
+V
DD
Voltage on xLO. . . . . . . . . . . . . . . . . . . . . . V
SS
-0.3V to V
DD
+0.3V
Voltage on xHO . . . . . . . . . . . . . . . . . . . .V
xHS
-0.3V to V
xHB
+0.3V
Phase Slew Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20V/ns
Operating Conditions
Supply Voltage, V
DD
. . . . . . . . . . . . . . . . . . . . . . . . . +7.0V to +15V
Voltage on V
xHS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0V to 80V
Voltage on xHB. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
xHS
+ V
DD
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Thermal Resistance (Typical, Note 1)
SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature. . . . . . . . . . . . . . . . . . . . . . . 150
o
C
Maximum Storage Temperature Range . . . . . . . . . .-65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . . 300
o
C
(SOIC - Lead Tips Only)
θ
JA
(
o
C/W)
75
o
C
65
o
C
Operating Ambient Temperature Range. . . . . . . . . .-40
o
C to 105
o
C
Operating Junction Temperature Range . . . . . . . . .-40
o
C to 105
o
C
NOTES:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
2. All voltages are relative to VSS unless otherwise specified.
3. x = A, B, C, and D. For example, xHS refers to AHS, BHS, CHS, and DHS.
Electrical Specifications
V
DD
= V
xHB
= 12V, V
SS
= V
xHS
= 0V, R
DEL
= 20K, UVLO/EN =
∞
, Gate Capacitance (C
GATE
) = 1000pF
PARAMETER
TEST CONDITIONS
T
J
= 25
o
C
T
J
= -40
o
C TO
150
o
C
UNITS
MIN
TYP
MAX
MIN
MAX
SUPPLY CURRENTS AND UNDER VOLTAGE PROTECTION
V
DD
Quiescent Current
xHI = 5V, xLI = 5V
3
4
5
2
6
mA
V
DD
Operating Current
f = 20kHz, 50% Duty Cycle
8
9.5
12
7
13
mA
xHB On Quiescent Current
xHI = 0V
-
40
80
-
100
μ
A
xHB Off Quiescent Current
xHI = V
DD
0.6
0.8
1.3
0.5
1.4
mA
xHB Operating Current
f = 20kHz, 50% Duty Cycle
0.7
0.9
1.3
2.0
mA
Q
PUMP
Output Voltage
No Load
11.5
12.5
14
10.5
14.5
V
Q
PUMP
Output Current
V
xHB
= 10V
-
100
130
-
140
μ
A
xHB, xHS Leakage Current
V
xHS
= 80V, V
xHB
= 93V
7
24
45
-
50
μ
A
V
DD
Rising Undervoltage Threshold
R
UV
Open
6.2
7.1
8.0
6.1
8.1
V
V
DD
Falling Undervoltage Threshold
R
UV
Open
5.75
6.6
7.5
5.6
7.6
V
Minimum Undervoltage Threshold
R
UV
= V
DD
5
6.2
6.8
4.9
6.9
V
INPUT PINS: ALI, BLI, CLI, DLI, AHI, BHI, CHI, DHI, AND EN
Low Level Input Voltage
-
-
1.0
-
0.8
V
High Level Input Voltage
2.5
-
-
2.7
-
V
Input Voltage Hysteresis
-
35
-
-
-
mV
Low Level Input Current
V
IN
= 0V
60
100
135
55
140
μ
A
High Level Input Current
V
IN
= 5V
-1
-
1
-10
10
μ
A
GATE DRIVER OUTPUT PINS: ALO, BLO, CLO, DLO, AHO, BHO, CHO, AND DHO
Low Level Output Voltage (V
OUT
-V
SS
)
I
SINKING
= 30mA
-
100
-
-
200
mV
Peak Pulse Pullup Current
V
OUT
0V to 5V
0.3
0.5
0.7
-
1.0
A
HIP4084
相關(guān)PDF資料
PDF描述
HIP4084AB 40000 SYSTEM GATE LOGIC CELL ARRAY - NOT RECOMMENDED for NEW DESIGN
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