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參數(shù)資料
型號(hào)： HI5741BIB-T
廠商： Intersil
文件頁(yè)數(shù)： 8/13頁(yè)
文件大?。?/td> 0K
描述： DAC 14BIT 100MHZ 5.2V 28-SOIC
標(biāo)準(zhǔn)包裝： 1,000
設(shè)置時(shí)間： 20ns
位數(shù)： 14
數(shù)據(jù)接口： 并聯(lián)
轉(zhuǎn)換器數(shù)目： 1
電壓電源： 模擬和數(shù)字，雙 ±
功率耗散（最大）： 650mW
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 28-SOIC（0.295"，7.50mm 寬）
供應(yīng)商設(shè)備封裝： 28-SOIC W
包裝： 帶卷 (TR)
輸出數(shù)目和類型： 2 電流，單極；2 電流，雙極
采樣率（每秒）： 100M
4
FN4071.12
September 20, 2006
Spurious Free Dynamic Range to Nyquist
(Note 4)
fCLK = 10 MSPS, fOUT = 1.023MHz, 5MHz Span
-
86
-
dBc
fCLK = 10 MSPS, fOUT = 2.02MHz, 5MHz Span
-
85
-
dBc
fCLK = 25 MSPS, fOUT = 2.02MHz, 12.5MHz Span
-
77
-
dBc
fCLK = 50 MSPS, fOUT = 5.055MHz, 25MHz Span
-
74
-
dBc
fCLK = 75 MSPS, fOUT = 7.52MHz, 37.5MHz Span
-
73
-
dBc
fCLK = 100 MSPS, fOUT = 10.1MHz, 50MHz Span
-
71
-
dBc
Multi-Tone Power Ratio
(MTPR)
8 Tones, no Clipping, 110kHz Spacing, 220kHz spacing
between tones 4 and 5, fCLK = 20 MSPS (Note 7)
-76
-
dBc
REFERENCE/CONTROL AMPLIFIER
Internal Reference Voltage, VREF
(Note 5)
-1.27
-1.23
-1.17
V
Internal Reference Voltage Drift
(Note 4)
-
50
-
V/°C
Internal Reference Output Current Sink/Source
Capability
(Note 4)
-500
-
+50
A
Internal Reference Load Regulation
IREF = 0 to IREF = -500A
-
100
-
V
Amplifier Input Impedance
(Note 4)
-
3
-
M
Amplifier Large Signal Bandwidth
4.0VP-P Sine Wave Input, to Slew Rate Limited (Note 4)
-
1
-
MHz
Amplifier Small Signal Bandwidth
1.0VP-P Sine Wave Input, to -3dB Loss (Note 4)
-
5
-
MHz
Reference Input Impedance (CTL IN)
(Note 4)
-
12
-
k
Reference Input Multiplying Bandwidth (CTL IN)
RL = 50, 100mV Sine Wave, to -3dB Loss at IOUT
(Note 4)
-75
-
MHz
DIGITAL INPUTS (D9-D0, CLK, INVERT)
Input Logic High Voltage, VIH
(Note 5)
2.0
-
V
Input Logic Low Voltage, VIL
(Note 5)
-
0.8
V
Input Logic Current, IIH
(Note 5)
-
400
A
Input Logic Current, IIL
(Note 5)
-
700
A
Digital Input Capacitance, CIN
(Note 4)
-
3.0
-
pF
TIMING CHARACTERISTICS
Data Setup Time, tSU
See Figure 1 (Note 4)
3
2.0
-
ns
Data Hold Time, tHLD
See Figure 1 (Note 4)
0.5
0.25
-
ns
Propagation Delay Time, tPD
See Figure 1 (Note 4)
-
4.5
-
ns
CLK Pulse Width, tPW1, tPW2
See Figure 1 (Note 4)
1.0
0.85
-
ns
POWER SUPPLY CHARACTERISTICS
IVEEA
(Note 5)
-
42
50
mA
IVEED
(Note 5)
-
75
95
mA
IVCCD
(Note 5)
-
13
20
mA
Power Dissipation
(Note 5)
-
650
-
mW
Power Supply Rejection Ratio
VCC ±5%, VEE ±5%
-
5
-
A/V
NOTES:
2. Dissipation rating assumes device is mounted with all leads soldered to printed circuit board.
3. Gain Error measured as the error in the ratio between the full scale output current and the current through RSET (typically 1.28mA). Ideally the
ratio should be 16.
4. Parameter guaranteed by design or characterization and not production tested.
5. All devices are 100% tested at +25°C.
6. Dynamic Range must be limited to a 1V swing within the compliance range.
7. In testing MTPR, tone frequencies ranged from 1.95MHz to 3.05MHz. The ratio is measured as the range from peak power to peak distortion in
the region of removed tones.
Electrical Specifications AVEE, DVEE = -4.94V to -5.46V, VCC = +4.75 to +5.25V, VREF = Internal,
TA = +25°C (Continued)
PARAMETER
TEST CONDITIONS
HI5741BI
TA = -40°C TO +85°C
UNITS
MIN
TYP
MAX
HI5741
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