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參數(shù)資料
| 型號： | HI2559JCQ |
| 廠商： | INTERSIL CORP |
| 元件分類： | DAC |
| 英文描述： | 1-Bit D/A Converter For Audio Application |
| 中文描述： | SERIAL INPUT LOADING, 1-BIT DAC, PQFP32 |
| 封裝： | MQFP-32 |
| 文件頁數(shù)： | 8/11頁 |
| 文件大?。?/td> | 669K |
| 代理商： | HI2559JCQ |
4-8
Description of Functions
A. Crystal Oscillator Frequency Selection
[Related pins] XTLI, XTLO, XCLK, BCK, SIN
Although the 384 F
S
or 256 V
S
crystal oscillator can be con-
nected to XTLI and XTLO, the selection is determined
depending on whether the input serial data is 24-bit or 32-bit
slot. The frequency of the crystal oscillator is output from
XCLK as it is.
B. Serial Data Interface
[Related pins] LRCK, BCK, SIN, MASL, MLSL
The serial data format consists of two channels per sampling
serial data represented by 2’s complement. In each channel,
the data is processed as a 24-bit slot when the crystal oscil-
lator frequency is 384 F
S
, and as a 32-bit slot when the crys-
tal oscillator frequency is 256 F
S
. 16 of these bits are used
as data.
MSL is used to select whether the serial data is arranged at
LSB first or MSB first. Also, MASL is used to select whether
the 16-bits of valid data is placed in the first or the second
half of the 32-bit slot.
C. Control Mode
[Related pins] ATT, SHIFT, LATCH
The serial ports of ATT, SHIFT and LATCH are used to con-
trol functions such as the digital attenuator, output selection
and digital de-emphasis.
Data consists of 24-bits (3 bytes), which have the following
meanings:
FIGURE 5.
Timing Diagrams
(Continued)
L0
L1
L2 L3
L4
L5
L6 L7 R0 R1 R2 R3 R4 R5 R6 R7 P0 P1 P2 P3
E
A
X
X
ATT
SHIFT
LSB
BYTE 0
BYTE 1
BYTE 2
MSB LSB
MSB
1
2
3
4
5
6
7
8
9
10
11
12 13
14
15
16 17
18
19
20
21 22
23
24
LATCH
SERIAL DATA INPUT
BIT RATE
CRYSTAL OSCILLATOR
FREQUENCY
XCLK
OUTPUT
24-Bit Slot (48F
S
)
384F
S
384F
S
32-Bit Slot (64F
S
)
256F
S
256F
S
CXD2500BQ
DA16
DA15
LRCK
XTAI
CXD2559Q
XTLI
XTLO
SIN
BCK
LRCK
XCLK
CXD2559Q
XTLI
XTLO
SIN
BCK
LRCK
XCLK
CXD2507Q
PCMD
BCK
LRCK
XTAI
24-SLOT
48F
S
IFS
384F
S
24-SLOT
48F
S
IFS
384F
S
FIGURE 6. CONNECTION EXAMPLE FOR THE CD DSP
384F
S
384F
S
MSL
H
MSB First
L
LSB First
MASL
24-BIT SLOT
32-BIT SLOT
H
Rearward Truncation
Frontward Truncation
L
Rearward Truncation
HI2559, CXD2559
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