
Figure 2 shows a possible application
of the HI-8585/86 interfacing an ARINC
transmitchannelfromtheHI-6010.
8
HI-8585, HI-8586
FUNCTIONAL DESCRIPTION
TXAOUT
CURRENT
-5V
5V
ONE
NULL
ZERO
CLOGIC
TXBOUT
CURRENT
CONTROL
-5V
5V
SLP1.5
ESD
PROTECTION
AND
VOLTAGE
TRANSLATION
FIGURE 1 - LINE DRIVER BLOCK DIAGRAM
HI-8585 = 37.5 OHMS
HI-8586 = 10.0 OHMS
HI-8585 = 37.5 OHMS
HI-8556 = 10.0 OHMS
ONE
NULL
ZERO
CLOGIC
1
2
8
6
7
4
3
4
5
6
7
2
3
FIGURE 2 - APPLICATION DIAGRAM
APPLICATION INFORMATION
1
5
Figure 1 is a block diagram of the line driver. The +5V and
-5V levels are generated internally using on-chip zeners.
Currents for slope control are set by zener voltages across
on-chipresistors.
The TX0IN and TX1IN inputs receive logic signals from a
control transmitter chip such as the HI-6010 or HI-8282.
TXAOUT and TXBOUT hold each side of the ARINC bus at
Ground until one of the inputs becomes a One. If for exam-
pleTX1INgoeshigh,achargingpathisenabledto5Vonan
“A” side internal capacitor while the “B” side is enabled to
-5V. The charging current is selected by the SLP1.5 pin. If
the SLP1.5 pin is high, the capacitor is nominally charged
from 10% to 90% in 1.5μs. If SLP1.5 is low, the rise and fall
timesare10μs.
A unity gain buffer receives the internally generated slopes
and differentially drives the ARINC line. Current is limited
by the series output resistors at each pin. There are no
fusesattheoutputsoftheHI-8585asexistsontheHI-8382.
TheHI-8585has37.5ohmsinserieswitheachoutput. The
HI-8586 has 10 ohms in series. The HI-8586 is for applica-
tions where more series resistance is added externally,
typicallyforlightningprotectiondevices.
HOLT INTEGRATED CIRCUITS
2
“A” SIDE
“B” SIDE