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參數(shù)資料
| 型號： | HI-7159A |
| 廠商： | Intersil Corporation |
| 英文描述： | 128 MACROCELL 3.3 VOLT ISP CPLD - NOT RECOMMENDED for NEW DESIGN |
| 中文描述： | 微處理器兼容，5-1/2位A / D轉(zhuǎn)換 |
| 文件頁數(shù)： | 9/14頁 |
| 文件大小： | 210K |
| 代理商： | HI-7159A |
9
Single Conversion Mode
The suggested algorithm for reading the HI-7159A in its
single conversion mode of operation is shown in Figure 5.
Essentially it consists of initiating a conversion, waiting until
the conversion is complete, and then reading the results.
Since no further conversions take place, the data may be
read out at any time and at any speed. This is the most
straightforward method of reading the HI-7159A.
Continuous Conversion Mode
Once a command byte is sent to the HI-7159A initiating the
continuous conversion mode, the output data registers will be
updated continuously after every conversion. This makes
obtaining a valid reading more difficult, since the possibility
exists that the current data could be overwritten by a new
conversion before all the digit bytes are read. To prevent this,
the status byte should be read before and after the data is
read from the converter, to ensure that the converter has not
updated during the reads. This is demonstrated in Figure 6.
TABLE 7. REQUEST BYTE FORMAT, SERIAL MODE 2 (SENT TO HI-7159A)
(RESERVED)
BYTE REQUEST
REQUEST BIT
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
Digit 0
0
0
0
1
Digit 1
0
0
1
Digit 2
0
1
0
Digit 3
0
1
1
Digit 4
1
0
0
Digit 5
1
0
1
Converter Status
1
1
0
TABLE 8. STATUS BYTE FORMAT (RECEIVED FROM HI-7159A)
(
)
CONVERTER
UPDATE STATUS
(
)
CONTINUITY
RESOLUTION
CONVERSION TYPE
PARITY
ERROR
D7
D6
D5
D4
D3
D2
D1
D0
0
No Update
0
0
Single
0
5
1
/
2
1
Comp
1
1
No
0
Updated
1
Continuous
1
4
1
/
2
0
Uncomp
1
0
Yes
1
Error
0
1
(
= Reserved)
TABLE 9. DIGIT BYTE FORMAT, PARALLEL AND SERIAL MODE 1 (RECEIVED FROM HI-7159A)
DIGIT BYTE
D7
D6
D5
D4
D3
D2
D1
D0
Digit Pair 0, 1
MSB1
LSB1
MSB0
LSB0
Digit Pair 2, 3
MSB3
LSB3
MSB2
LSB2
Digit Pair 4, 5
Polarity
(1 = POS)
Overrange
(1 = OR)
MSB5
LSB5
MSB4
LSB4
TABLE 10. DIGIT BYTE FORMAT, SERIAL MODE 2 (RECEIVED FROM HI-7159A)
DIGIT BYTE
D7
D6
D5
D4
D3
D2
D1
D0
Digits 0 - 4
0
0
1
1
MSB
LSB
Digit 5
0
0
1
1
Polarity
(1 = POS)
Overrange
(1 = OR)
MSB
LSB
HI-7159A
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