參數(shù)資料
型號(hào): HFA5251
廠商: Intersil Corporation
英文描述: 800MHz Monolithic Pin Driver
中文描述: 800MHz的單片管腳驅(qū)動(dòng)
文件頁數(shù): 4/10頁
文件大?。?/td> 137K
代理商: HFA5251
4
Rise/Fall Time (10%-90%) (Note 6)
5V
P-P
25
-
1.5
1.7
ns
Rise/Fall Time Match (Note 6)
25
-
50
150
ps
Minimum Pulse Width (Note 16)
1V
P-P
3V
P-P
5V
P-P
3V
P-P
25
-
1.0
-
ns
Minimum Pulse Width (Note 16)
25
-
1.2
-
ns
Minimum Pulse Width (Note 16)
25
-
2.0
-
ns
Overshoot/Undershoot/Preshoot
25
-
5
-
%
Data Settling Time to 1% (Note 3)
25
-
10
-
ns
OUTPUT CHARACTERISTICS
Output Voltage Swing (No Load)
V
CC
= 10V, V
EE
= -5.2V
At Other Supplies
25
-2
-
7
V
25
V
EE
+3.2
45
-
V
CC
-3.0
49
V
DC Output Resistance - Active (Note 18)
-2V to 7V
25
47
Output Leakage - HiZ
-2V to 7V
25
-100
±
10
100
nA
Output Capacitance - HiZ
25
-
5
-
pF
Output Current - Active
25
70
100
-
mA
POWER SUPPLY CHARACTERISTICS
Power Supply Rejection Ratio (Note 4)
V
HIGH
V
LOW
25
-
14
40
mV/V
25
-
14
40
mV/V
Total Supply Current
25
90
94
96
mA
Supply Current (I
CC1
, I
EE1
)
Supply Current (I
CC2
, I
EE2
)
Supply Voltage Range (Note 5)
25
-
74
-
mA
25
-
20
-
mA
V
CC
V
EE
V
CC
- V
EE
No Load At V
CC
= 10V,
V
EE
= -5.2V
25
9.8
10
10.2
V
Supply Voltage Range (Note 5)
25
-5.4
-5.2
-5.0
V
Supply Voltage Differential
25
12
-
15.6
V
Power Dissipation
25
-
-
1.46
W
NOTES:
1. Internal Power Dissipation may limit Output Current below 160mA.
2. 3V Step, 50% duty cycle, 200ns period.
3. 3V Step, measured from 50% of input to
±
1% of reference value at 50ns.
4. V
HIGH
= 2.6V, V
LOW
= 2.3V, V
CC
= 9V to 10V, V
EE
= -4.2V to -5.2V
5. Minimum/maximum output swing will vary with supply voltage.
6. 5V Step, 50% duty cycle, 100ns period.
7. For V
HIGH
= 0V to 5V, For V
LOW
= 0V to 5V, Fullscale = 5V, 0.1% = 5mV.
8. For V
HIGH
= -1.5V to 7V, For V
LOW
= -2.0V to 6.5V, Fullscale = 8.5V, 0.1% = 8.5mV
9. Shorting the output to a voltage outside the specified range may damage the output.
10. V
CC
= 9.9V, V
EE
= -5.1V.
11. V
HIGH
to V
LOW
Interaction is measured as the change in V
OUT
(the active channel) due to a change in the inactive channel. V
HIGH
Interaction at 250mV is measured as the deviation from 1V as V
LOW
is changed from 0V to 750mV (Referred to V
OUT
). V
Low
Interaction at
250mV is measured as the deviation from 0V as V
HIGH
is changed from 1V to 250mV (Referred to V
OUT
).
12. 0V to 3V Step, 200ns period, Pulse Width is varied from 5ns to 195ns.
13. End Point Gain Deviation is the percent deviation of Gain calculated in 0.5V steps at the extremes of output voltage range. For example in the
V
HIGH
range 5.7V to 6.7V, Gain is calculated for V
HIGH
= 5.7V to 6.2V (Note 15) and V
HIGH
= 6.2V to 6.7V (Note 15) the difference in gain is
calculated and converted to a percentage. The voltage ranges tested are: V
HIGH
= -1.5V to -0.5V (Note 15) and 5.7V to 6.7V (Note 15), V
LOW
= -2.0V to -1.0V (Note 15) and 5.5V to 6.5V (Note 15).
14. V
HIGH
End Point Gain Error is the V
OUT
absolute error from ideal for a V
HIGH
change from 6.7V to 7.0V (Note 15).
15. Input voltages V
HIGH
and V
LOW
are corrected for Offset Voltage and 7.5V Full Scale Gain Error.
16. Minimum Pulse Width is measured 50% to 50% of specified amplitude with pulse peak at 90% of amplitude.
17. Test is performed into a 50
load with a 3V step. Measurement is made from the 50% of input to 50% of output.
18. Dynamic Output Resistance will be higher (typical 48.5
) than DC Output Resistance.
Electrical Specifications
V
CC
= +10V, V
EE
= -5.2V, V
IH
= -0.9V, V
IL
= -1.75V, Unless Otherwise Specified
(Continued)
PARAMETER
TEST CONDITIONS
TEMP.
(
o
C)
MIN
TYP
MAX
UNITS
HFA5251
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