![](http://datasheet.mmic.net.cn/280000/HF234BT100D3201_datasheet_16070274/HF234BT100D3201_424.png)
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11.5.3
Switching between Watchdog Timer Mode and Interval Timer Mode
If the mode is switched from watchdog timer to interval timer, or vice versa, while the WDT is
operating, errors could occur in the incrementation. Software must stop the watchdog timer (by
clearing the TME bit to 0) before switching the mode.
11.5.4
System Reset by
WDTOVF
Signal
If the
WDTOVF
output signal* is input to the
RES
pin of the H8S/2345 Series, the H8S/2345
Series will not be initialized correctly. Make sure that the
WDTOVF
signal* is not input logically
to the
RES
pin. To reset the entire system by means of the
WDTOVF
signal*, use the circuit
shown in figure 11.9.
Note: * The
WDTOVF
pin function is not supported by the F-ZTAT version.
Reset input
Reset signal to entire system
H8S/2345
Note:
*
The
WDTOVF
pin function is not supported by the F-ZTAT version.
RES
WDTOVF
*
Figure 11.9 Circuit for System Reset by
WDTOVF
Signal (Example)
11.5.5
Internal Reset in Watchdog Timer Mode
The H8S/2345 Series is not reset internally if TCNT overflows while the RSTE bit is cleared to 0
during watchdog timer operation, but TCNT and TSCR of the WDT are reset.
TCNT, TCSR, and RSTCR cannot be written to while the
WDTOVF
signal* is low. Also note that
a read of the WOVF flag is not recognized during this period. To clear the WOVF flag, therefore,
read TCSR after the
WDTOVF
signal* goes high, then write 0 to the WOVF flag.
Note: * The
WDTOVF
pin function is not supported by the F-ZTAT version.