參數(shù)資料
型號: HEF4053B
廠商: NXP Semiconductors N.V.
英文描述: Triple 2-channel analogue multiplexer/demultiplexer(三2通道模擬多路復用器/多路分解器)
中文描述: 三2通道模擬多路復用器/解復用器(三2通道模擬多路復用器/多路分解器)
文件頁數(shù): 7/9頁
文件大小: 118K
代理商: HEF4053B
January 1995
7
Philips Semiconductors
Product specification
Triple 2-channel analogue
multiplexer/demultiplexer
HEF4053B
MSI
AC CHARACTERISTICS
V
EE
= V
SS
= 0 V; T
amb
= 25
°
C; input transition times
20 ns
AC CHARACTERISTICS
V
EE
= V
SS
= 0 V; T
amb
= 25
°
C; input transition times
20 ns
V
DD
V
TYPICAL FORMULA FOR P (
μ
W)
Dynamic power
dissipation per
package (P)
5
2 500 f
i
+ ∑
(f
o
C
L
)
×
V
DD2
11 500 f
i
+ ∑
(f
o
C
L
)
×
V
DD2
29 000 f
i
+ ∑
(f
o
C
L
)
×
V
DD2
where
f
i
= input freq. (MHz)
f
o
= output freq. (MHz)
C
L
= load capacitance (pF)
(f
o
C
L
) = sum of outputs
V
DD
= supply voltage (V)
10
15
V
DD
V
SYMBOL
TYP.
MAX.
Propagation delays
V
is
V
os
HIGH to LOW
5
10
20
10
10
30
10
10
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
note 1
10
15
5
10
15
5
10
15
5
10
15
t
PHL
5
5
15
note 1
LOW to HIGH
t
PLH
5
5
S
n
V
os
HIGH to LOW
200
85
65
275
100
65
400
170
130
555
200
130
note 2
t
PHL
note 2
LOW to HIGH
t
PLH
Output disable times
E
V
os
HIGH
5
200
115
110
200
120
110
400
230
220
400
245
215
ns
ns
ns
ns
ns
ns
note 3
10
15
5
10
15
t
PHZ
note 3
LOW
t
PLZ
Output enable times
E
V
os
HIGH
5
260
95
65
280
105
70
525
190
130
565
205
140
ns
ns
ns
ns
ns
ns
note 3
10
15
t
PZH
5
note 3
LOW
10
15
t
PZL
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