參數(shù)資料
型號: HEF4053B
廠商: NXP Semiconductors N.V.
英文描述: Triple 2-channel analogue multiplexer/demultiplexer(三2通道模擬多路復用器/多路分解器)
中文描述: 三2通道模擬多路復用器/解復用器(三2通道模擬多路復用器/多路分解器)
文件頁數(shù): 2/9頁
文件大?。?/td> 118K
代理商: HEF4053B
January 1995
2
Philips Semiconductors
Product specification
Triple 2-channel analogue
multiplexer/demultiplexer
HEF4053B
MSI
DESCRIPTION
The HEF4053B is a triple 2-channel analogue
multiplexer/demultiplexer with a common enable input (E).
Each multiplexer/demultiplexer has two independent
inputs/outputs (Y
0
and Y
1
), a common input/output (Z),
and select inputs (S
n
). Each also contains two-bidirectional
analogue switches, each with one side connected to an
independent input/output (Y
0
and Y
1
) and the other side
connected to a common input/output (Z).
With E LOW, one of the two switches is selected (low
impedance ON-state) by S
n
. With E HIGH, all switches are
in the high impedance OFF-state, independent of S
A
to S
C
.
V
DD
and V
SS
are the supply voltage connections for the
digital control inputs (S
A
to S
C
and E).
The V
DD
to V
SS
range is 3 to 15 V. The analogue
inputs/outputs (Y
0
, Y
1
and Z) can swing between V
DD
as a
positive limit and V
EE
as a negative limit. V
DD
V
EE
may not
exceed 15 V.
For operation as a digital multiplexer/demultiplexer, V
EE
is
connected to V
SS
(typically ground).
FAMILY DATA, I
DD
LIMITS category MSI
See Family Specifications
Fig.1 Functional diagram.
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