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參數(shù)資料
| 型號： | HEF4046BD |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | XO, clock |
| 英文描述： | Programmable Logic Controller; RoHS Compliant: Yes |
| 中文描述： | PHASE LOCKED LOOP, CDIP16 |
| 文件頁數(shù)： | 5/15頁 |
| 文件大?。?/td> | 416K |
| 代理商： | HEF4046BD |
January 1995
5
Philips Semiconductors
Product specification
Phase-locked loop
HEF4046B
MSI
Phase comparator 2 is an edge-controlled digital memory
network. It consists of four flip-flops, control gating and a
3-state output circuit comprising p and n-type drivers
having a common output node. When the p-type or n-type
drivers are ON, they pull the output up to V
DD
or down to
V
SS
respectively. This type of phase comparator only acts
on the positive-going edges of the signals at SIGN
IN
and
COMP
IN
. Therefore, the duty factors of these signals are
not of importance.
If the signal input frequency is higher than the comparator
input frequency, the p-type output driver is maintained ON
most of the time, and both the n and p-type drivers are
OFF (3-state) the remainder of the time. If the signal input
frequency is lower than the comparator input frequency,
the n-type output driver is maintained ON most of the time,
and both the n and p-type drivers are OFF the remainder
of the time. If the signal input and comparator input
frequencies are equal, but the signal input lags the
comparator input in phase, the n-type output driver is
maintained ON for a time corresponding to the phase
difference. If the comparator input lags the signal input in
phase, the p-type output driver is maintained ON for a time
corresponding to the phase difference. Subsequently, the
voltage at the capacitor of the low-pass filter connected to
this phase comparator is adjusted until the signal and
comparator inputs are equal in both phase and frequency.
At this stable point, both p and n-type drivers remain OFF
and thus the phase comparator output becomes an open
circuit and keeps the voltage at the capacitor of the
low-pass filter constant.
Moreover, the signal at the phase comparator pulse output
(PCP
OUT
) is a HIGH level which can be used for indicating
a locked condition. Thus, for phase comparator 2 no phase
difference exists between the signal and comparator
inputs over the full VCO frequency range. Moreover, the
power dissipation due to the low-pass filter is reduced
when this type of phase comparator is used because both
p and n-type output drivers are OFF for most of the signal
input cycle. It should be noted that the PLL lock range for
this type of phase comparator is equal to the capture
range, independent of the low-pass filter. With no signal
present at the signal input, the VCO is adjusted to its
lowest frequency for phase comparator 2 . Figure 5 shows
typical waveforms for a PLL employing this type of phase
comparator in locked condition.
Fig.5 Typical waveforms for phase-locked loop employing phase comparator 2 in locked condition.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HEF4046BF | Phase-locked loop |
| HEF4046BN | Programmable Logic Controller; Leaded Process Compatible:No; Peak Reflow Compatible (260 C):No RoHS Compliant: No |
| HEF4052B | Dual 4-channel analogue multiplexer/demultiplexer(雙四通道模擬多路復(fù)用器/多路分解器) |
| HEF4059B | Programmable divide-by-n counter(可編程÷n計(jì)數(shù)器) |
| HEF4060B | 14-stage ripple-carry binary counter/divider and oscillator(14級紋波進(jìn)位二進(jìn)制計(jì)數(shù)器/除法器和振蕩器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HEF4046BF | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Phase-locked loop |
| HEF4046BN | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Phase-locked loop |
| HEF4046BP | 制造商:NXP Semiconductors 功能描述:IC 4000 LOCMOS LOGIC 制造商:NXP Semiconductors 功能描述:IC, 4000 LOCMOS LOGIC 制造商:NXP 功能描述:2.7Mhz 16-DIP Phase Lock Loop 制造商:NXP Semiconductors 功能描述:IC, PHASE LOCK LOOP, 2.7MHZ, 16-DIP; PLL Type:VCO; Frequency:7MHz; Supply Current:750A; Supply Voltage Min:3V; Supply Voltage Max:15V; Digital IC Case Style:DIP; No. of Pins:16; Operating Temperature Min:-40C; Family Type:4000 CMOS;RoHS Compliant: Yes |
| HEF4046BP,652 | 功能描述:鎖相環(huán) - PLL PHASE LOCKED LOOP W/VCO RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| HEF4046BP652 | 制造商:NXP Semiconductors 功能描述:IC PHASE LOCKED LOOP (PLL) VCO 2.7MHZ |
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