參數(shù)資料
型號: HEF4014BT
廠商: NXP Semiconductors N.V.
元件分類: 通用總線功能
英文描述: 8-bit static shift register
封裝: HEF4014BP<SOT38-4 (DIP16)|<<http://www.nxp.com/packages/SOT38-4.html<1<Always Pb-free,;HEF4014BT<SOT109-1 (SO16)|<<http://www.nxp.com/packages/SOT109-1.html<1<week
文件頁數(shù): 6/14頁
文件大?。?/td> 143K
代理商: HEF4014BT
HEF4014B
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NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 7 — 14 September 2011
6 of 14
NXP Semiconductors
HEF4014B
8-bit static shift register
11. Dynamic characteristics
[1]
The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (C
L
in pF).
t
t
is the same as t
THL
and t
TLH
.
[2]
Table 7.
T
amb
= 25
C; V
SS
= 0 V.
Symbol
Parameter
t
PHL
HIGH to LOW
propagation delay
Dynamic characteristics
Conditions
CP to Qn;
see
Figure 4
V
DD
5 V
10 V
15 V
5 V
10 V
15 V
5 V
10 V
15 V
5 V
10 V
15 V
5 V
10 V
15 V
5 V
Extrapolation formula
[1]
103 ns + (0.55 ns/pF)C
L
44 ns + (0.23 ns/pF)C
L
32 ns + (0.16 ns/pF)C
L
88 ns + (0.55 ns/pF)C
L
39 ns + (0.23 ns/pF)C
L
32 ns + (0.16 ns/pF)C
L
10 ns + (1.00 ns/pF)C
L
9 ns + (0.42 ns/pF)C
L
6 ns + (0.28 ns/pF)C
L
Min
-
-
-
-
-
-
-
-
-
70
30
24
40
25
15
+35
Typ
130
55
40
115
50
40
60
30
20
35
15
12
10
5
0
5
5
0
5
5
0
5
0
0
15
10
7
15
10
7
13
30
40
Max
260
110
80
230
100
80
120
60
40
-
-
-
-
-
-
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
PLH
LOW to HIGH
propagation delay
CP to Qn;
see
Figure 4
t
t
transition time
Qn output;
see
Figure 4
[2]
t
W
pulse width
CP input;
minimum width;
see
Figure 5
t
su
set-up time
PE
CP;
see
Figure 5
DS
CP;
see
Figure 5
10 V
15 V
5 V
10 V
15 V
5 V
10 V
15 V
5 V
10 V
15 V
5 V
10 V
15 V
5 V
10 V
15 V
+25
25
+35
+25
25
+25
20
15
30
20
15
30
20
15
6
15
20
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
MHz
Dn
CP;
see
Figure 5
t
h
hold time
PE
CP;
see
Figure 5
DS
CP;
see
Figure 5
Dn
CP;
see
Figure 5
f
clk(max)
maximum clock
frequency
see
Figure 5
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