參數(shù)資料
型號(hào): HEF4011UBP
廠商: NXP Semiconductors N.V.
元件分類: 通用總線功能
英文描述: Quadruple 2-input NAND gate
封裝: HEF4011UBP<SOT27-1 (DIP14)|<<http://www.nxp.com/packages/SOT27-1.html<1<Always Pb-free,;HEF4011UBT<SOT108-1 (SO14)|<<http://www.nxp.com/packages/SOT108-1.html<1<wee
文件頁數(shù): 6/8頁
文件大小: 133K
代理商: HEF4011UBP
January 1995
6
Philips Semiconductors
Product specification
Quadruple 2-input NAND gate
HEF4011UB
gates
APPLICATION INFORMATION
Some examples of applications for the HEF4011UB are shown below.
Because of the fact that this circuit is unbuffered, it is suitable for use in (partly) analogue circuits.
Fig.9
(a) Astable relaxation oscillator using two HEF4011UB gates; the diodes may be BAW62; C2 is a parasitic
capacitance.
(b) Waveforms at the points marked A, B, C and D in the circuit diagram.
INH
O
L
H
H
OSC
In Fig.9 the oscillation frequency is mainly determined by R1C1,
provided R1
<<
R2 and R2C2
<<
R1C1.
The function of R2 is to minimize the influence of the forward voltage
across the protection diodes on the frequency; C2 is a stray (parasitic)
capacitance. The period T
p
is given by T
p
= T
1
+
T
2
, in which
V
is the signal threshold level of the gate. The period is fairly
independent of V
DD
, V
ST
and temperature. The duty factor, however, is
influenced by V
ST
.
T
1
R1C1 In
V
---------------------------
and T
2
V
+
ST
R1C1 In
2V
DD
V
ST
-------------–
where
=
=
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