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參數(shù)資料
| 型號(hào)： | HDMP-T1636A |
| 英文描述： | Gigabit Ethernet Serialize/Deserialize (SerDes) IC(千兆位以太網(wǎng)串行器/解串行器) |
| 中文描述： | 千兆以太網(wǎng)序列化/反序列化器（SerDes）集成電路（千兆位以太網(wǎng)串行器/解串行器） |
| 文件頁(yè)數(shù)： | 9/16頁(yè) |
| 文件大小： | 248K |
| 代理商： | HDMP-T1636A |
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9
HDMP-1636A/46A/T1636A (Transmitter Section)
Output Jitter Characteristics
T
A
= 0
°
C to +70
°
C, V
CC
= 3.15 V to 3.45 V
Symbol
RJ
[1]
Random Jitter at DOUT, the High Speed Electrical Data Port, specified as
one sigma deviation of the 50% crossing point (RMS)
DJ
[1]
Deterministic Jitter at DOUT, the High Speed Electrical Data Port (pk-pk)
Parameter
Units
ps
Typ.
8
ps
15
Note:
1. Defined by Fibre Channel Specification X3.230-1994 FC-PH Standard, Annex A, Section A.4 and tested using measurement
method shown in Figure 8.
HDMP-1636A/46A/T1636A (TRx)
Thermal and Power Temperature Characteristics
T
A
= 0
°
C to +70
°
C, V
CC
= 3.15 V to 3.45 V
Symbol
P
D,TRx[1,2]
Transceiver Power Dissipation, Outputs Open, Parallel Data
has 5 Ones and 5 Zeroes
P
D,TRx[1,2,3]
Transceiver Power Dissipation, Outputs Connected per
Recommended Bias Terminations with Idle Pattern
Θ
jc[4]
Thermal Resistance, Junction to Case
Parameter
Units
mW
Typ.
630
Max.
850
mW
675
900
HDMP-1636A
HDMP-T1636A/HDMP-1646A
°
C/Watt
11
8
Notes:
1. P
D
is obtained by multiplying the max V
CC
by the max I
CC
and subtracting the power dissipated outside the chip at the high speed
bias resistors.
2. Typical value specified with V
CC
= 3.3 volts, maximum value specified with V
CC
= 3.45 volts.
3. Specified with high speed outputs biased with 150
resistors and receiver TTL outputs driving 10 pF loads.
4. Based on independent package testing by Agilent Technologies.
Θ
ja
for these devices is 56
°
C/Watt for the HDMP-1636A and 51
°
C/
Watt for the HDMP-T1636A / HDMP-1646A.
Θ
ja
is measured on a standard 3x3" FR4 PCB in a still air environment. To determine
the actual junction temperature in a given application, use the following: T
j
= T
C
+ (
Θ
jc
x P
D
), where T
C
is the case temperature
measured on the top center of the package and P
D
is the power being dissipated.
Figure 8. Transmitter Jitter Measurement Method.
a. Block Diagram of RJ Measurement Method.
b. Block Diagram of DJ Measurement Method.
70841B
PATTERN
GENERATOR*
83480A
OSCILLOSCOPE
HDMP-1636A
70311A
CLOCK SOURCE
+ DATA
- DATA
0000011111
TRIGGER
CH1
CH2
+DOUT
-DOUT
REFCLK LOOPEN
Tx[0..9]
BIAS
TEE
1.4 V
0011111000
(STATIC K28.7)
1.25 GHz
125 MHz
* PATTERN
GENERATOR
PROVIDES A
DIVIDE BY
10 FUNCTION.
70841B
PATTERN
GENERATOR
83480A
OSCILLOSCOPE
HDMP-1636A
70311A
CLOCK SOURCE
+ DATA
- DATA
+K28.5, -K28.5
TRIGGER
CH1
CH2
+DOUT
-DOUT
REFCLK
LOOPEN
Tx[0..9]
1.25 GHz
125 MHz
ENBYTSYNC
Rx[0..9]
-DIN
+DIN
DIVIDE
BY 2
CIRCUIT
DIVIDE
BY 10
CIRCUIT
(DUAL
OUTPUT)
VARIABLE
DELAY
TTL
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