- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄370499 > HDMP-1646A Gigabit Ethernet Serialize/Deserialize (SerDes) IC(千兆位以太網(wǎng)串行器/解串行器) PDF資料下載
參數(shù)資料
| 型號： | HDMP-1646A |
| 英文描述： | Gigabit Ethernet Serialize/Deserialize (SerDes) IC(千兆位以太網(wǎng)串行器/解串行器) |
| 中文描述： | 千兆以太網(wǎng)序列化/反序列化器（SerDes）集成電路（千兆位以太網(wǎng)串行器/解串行器） |
| 文件頁數(shù)： | 4/16頁 |
| 文件大?。?/td> | 248K |
| 代理商： | HDMP-1646A |
4
HDMP-1636A/46A/T1636A (Transmitter Section)
Timing Characteristics
T
A
= 0
°
C to +70
°
C, V
CC
= 3.15 V to 3.45 V
Symbol
Parameter
t
setup
Setup Time
t
hold
Hold Time
t_txlat
[1]
Transmitter Latency
Units
nsec
nsec
nsec
bits
Min.
1.5
1.0
Typ.
Max.
3.5
4.4
Note:
1. The transmitter latency, as shown in Figure 4, is defined as the time between the latching in of the parallel data word (as triggered
by the rising edge of the transmit byte clock, REFCLK) and the transmission of the first serial bit of that parallel word (defined by
the rising edge of the first bit transmitted).
input, and invokes the phase
detection as the data stream
appears. Once bit locked, the
receiver generates the high speed
sampling clock at 1250 MHz for
the input sampler, and recovers
the two 62.5 MHz receiver byte
clocks (RBC1/RBC0). These
clocks are 180 degrees out of
phase with each other, and are
alternately used to clock out the
10-bit parallel output data.
INPUT SAMPLER
The INPUT SAMPLER is respon-
sible for converting the serial
input signal into a retimed serial
bit stream. In order to accom-
plish this, it uses the high speed
serial clock recovered from the
RX PLL/CLOCK RECOVERY
block. This serial bit stream is
sent to the FRAME DEMUX and
BYTE SYNC block.
FRAME DEMUX AND BYTE
SYNC
The FRAME DEMUX AND BYTE
SYNC block is responsible for
restoring the 10-bit parallel data
from the high speed serial bit
stream. This block is also
responsible for recognizing the
comma character (or a K28.5
character) of positive disparity
(0011111xxx). When recognized,
the FRAME DEMUX AND BYTE
SYNC block works with the RX
PLL/CLOCK RECOVERY block to
properly align the receive byte
clocks to the parallel data. When
a comma character is detected
and realignment of the receiver
byte clocks (RBC1/RBC0) is
necessary, these clocks are
stretched, not slivered, to the
next possible correct alignment
position. These clocks will be
fully aligned by the start of the
second 2-byte ordered set. The
second comma character
received shall be aligned with the
rising edge of RBC1. As per the
8B/10B encoding scheme,
comma characters must not be
transmitted in consecutive bytes
to allow the receiver byte clocks
to maintain their proper
recovered frequencies.
OUTPUT DRIVERS
The OUTPUT DRIVERS present
the 10-bit parallel recovered data
byte properly aligned to the
receive byte clocks (RBC1/RBC0),
as shown in Figure 5. These
output data buffers provide TTL
compatible signals.
SIGNAL DETECT
The SIGNAL DETECT block
examines the differential
amplitude of the inputs
±
DIN.
When this input signal is too
small, it outputs a logic 0 at
SIG_DET (refer to SIG_DET pin
definition for detection
thresholds), and at the same
time, forces the parallel output
RX[0]..RX[9] to all logic one
(1111111111). The main
purpose of this circuit is to
prevent the generation of random
data when the serial input lines
are disconnected. When the
signal at
±
DIN is of a valid
amplitude, SIG_DET is set to
logic 1, and the output of the
INPUT SELECT block is passed
through.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HDMP-1636A | Gigabit Ethernet Serialize/Deserialize (SerDes) IC(千兆位以太網(wǎng)串行器/解串行器) |
| HDMP-T1636A | Gigabit Ethernet Serialize/Deserialize (SerDes) IC(千兆位以太網(wǎng)串行器/解串行器) |
| HDN1075O | Plug-In Relay; Contacts:DPDT; Coil Voltage AC Max:120V; Contact Carry Current:10A; Relay Terminals:8-Pin Octal; Relay Mounting:Plug-In; Contact Carrying Power:2VA; Contact Rating:10A; Mounting Type:Plug In; Switch Function:DPDT |
| HDN1077O | Pressure Transducer, Series 19 mm, Compensated, Pressure Range: 0 psi to 200 psi, Gage, 1/4 BSPP, 10 Vdc excitation |
| HDN1075 | 0.28(7MM) SEVEN SEGMANT NUMERIC DISPLAY SOW CURRENT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HDMP1646AG | 制造商:Agilent Technologies 功能描述: |
| HDMP-1685A | 制造商:AGILENT 制造商全稱:AGILENT 功能描述:Agilent HDMP-1685A 1.25 Gbps Four Channel SerDes with 5-pin DDR SSTL_2 Parallel Interface |
| HDMP-1687 | 制造商:AGILENT 制造商全稱:AGILENT 功能描述:Four Channel SerDes Circuit for Gigabit Ethernet and Fibre Channel |
| HDMP-19-01-S-EM | 制造商:Samtec Inc 功能描述:HDMP INSULATOR FOR LOCKING PLUG - Bulk |
| HDMP2003 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FIBER OPTIC SUPPORT CIRCUIT |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。