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參數(shù)資料
| 型號： | HD74ALVCH16270 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 12-bit to 24-bit Registered Bus Exchanger with 3-state Outputs(三態(tài)輸出的12位至24位寄存總線交換器) |
| 中文描述： | 12位至24位注冊總線交換器與三態(tài)輸出（三態(tài)輸出的12位至24位寄存總線交換器） |
| 文件頁數(shù)： | 1/13頁 |
| 文件大?。?/td> | 67K |
| 代理商： | HD74ALVCH16270 |
HD74ALVCH16270
12-bit to 24-bit Registered Bus Exchanger with 3-state Outputs
ADE-205-137 (Z)
Preliminary 1st. Edition
May 1996
Description
The HD74ALVCH16270 is used in applications where data must be transferred from a narrow high
speed bus to a wide lower frequency bus. The device provides synchronous data exchange between the
two ports. Data is stored in the internal registers on the low to high transition of the clock (CLK) input
when the appropriate
CLKEN
inputs are low. The select (
SEL
) line selects 1B or 2B data for the A
outputs. For data transfer in the A to B direction, a two stage pipeline is provided in the A to 1B path,
with a single storage register in the A to 2B path. Proper control of the
CLKENA
inputs allows two
sequential 12-bit words to be presented synchronously as a 24-bit word on the B port. Data flow is
controlled by the active low output enables (
OEA
,
OEB
). The control terminals are registered to
synchronize the bus direction changes with CLK. Active bus hold circuitry is provided to hold unused
or floating data inputs at a valid logic level.
Features
V
CC
= 2.3 V to 3.6 V
Typical V
OL
ground bounce < 0.8 V (@V
CC
= 3.3 V, Ta = 25°C)
Typical V
OH
undershoot > 2.0 V (@V
CC
= 3.3 V, Ta = 25°C)
High output current ±24 mA (@V
CC
= 3.0 V)
Bus hold on data inputs eliminates the need for external pullup / pulldown resistors
相關PDF資料 |
PDF描述 |
|---|---|
| HD74ALVCH162721 | 3.3-V 20-bit Flip Flops with 3-state Outputs(三態(tài)輸出的3.3V20位D觸發(fā)器) |
| HD74ALVCH162820 | 3.3-V 10-bit Flip Flops with Dual Outputs and 3-state Outputs(帶雙輸出和三態(tài)輸出的3.3V10位D觸發(fā)器) |
| HD74ALVCH162821 | 3.3-V 20-bit Bus Interface Flip Flops with 3-state Outputs(三態(tài)輸出的3.3V20位總線接口D觸發(fā)器) |
| HD74ALVCH162825 | 18-bit Buffers / Drivers with 3-state Outputs(三態(tài)輸出18位緩沖器/驅動器) |
| HD74ALVCH162827 | 20-bit Buffers / Drivers with 3-state Outputs(三態(tài)輸出20位緩沖器/驅動器) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| HD74ALVCH162721 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:3.3-V 20-bit Flip Flops with 3-state Outputs |
| HD74ALVCH162820 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:3.3-V 10-bit Flip Flops with Dual Outputs and 3-state Outputs |
| HD74ALVCH162821 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:3.3-V 20-bit Bus Interface Flip Flops with 3-state Outputs |
| HD74ALVCH162825 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:18-bit Buffers / Drivers with 3-state Outputs |
| HD74ALVCH162827 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:20-bit Buffers / Drivers with 3-state Outputs |
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