- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄370475 > HD74ALVCH162821 (Hitachi,Ltd.) 3.3-V 20-bit Bus Interface Flip Flops with 3-state Outputs(三態(tài)輸出的3.3V20位總線接口D觸發(fā)器) PDF資料下載
參數(shù)資料
| 型號： | HD74ALVCH162821 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 3.3-V 20-bit Bus Interface Flip Flops with 3-state Outputs(三態(tài)輸出的3.3V20位總線接口D觸發(fā)器) |
| 中文描述： | 3.3 V的20位總線接口字拖與三態(tài)輸出（三態(tài)輸出的3.3V20位總線接口?觸發(fā)器） |
| 文件頁數(shù)： | 1/12頁 |
| 文件大?。?/td> | 56K |
| 代理商： | HD74ALVCH162821 |
HD74ALVCH162821
3.3-V 20-bit Bus Interface Flip Flops with 3-state Outputs
ADE-205-186A (Z)
2nd. Edition
September 1997
Description
The HD74ALVCH162821 can be used as two 10-bit flip flops or one 20-bit flip flop. The 20 flip flops are
edge triggered D-type flip flops. On the positive transition of the clock (CLK) input, the device provides
true data at the Q outputs. A buffered output enable (
OE
) input can be used to place the ten outputs in
either a normal logic state (high or low level) or a high impedance state. In the high impedance state, the
outputs neither load nor drive the bus lines significantly. The high impedance state and increased drive
provide the capability to drive bus line without need for interface or pullup components. The output enable
(
OE
) input does not affect the internal operations of the flip flops. Old data can be retained or new data can
be entered while the outputs are in the high impedance state. Active bus hold circuitry is provided to hold
unused or floating data inputs at a valid logic level. All outputs, which are designed to sink up to 12 mA,
include 26
resistors to reduce overshoot and undershoot.
Features
V
CC
= 2.3 V to 3.6 V
Typical V
OL
ground bounce < 0.8 V (@V
CC
= 3.3 V, Ta = 25°C)
Typical V
OH
undershoot > 2.0 V (@V
CC
= 3.3 V, Ta = 25°C)
High output current ±12 mA (@V
CC
= 3.0 V)
Bus hold on data inputs eliminates the need for external pullup / pulldown resistors
All outputs have equivalent 26
series resistors, so no external resistors are required.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HD74ALVCH162825 | 18-bit Buffers / Drivers with 3-state Outputs(三態(tài)輸出18位緩沖器/驅(qū)動器) |
| HD74ALVCH162827 | 20-bit Buffers / Drivers with 3-state Outputs(三態(tài)輸出20位緩沖器/驅(qū)動器) |
| HD74ALVCH162830 | 1-bit to 2-bit Address Driver with 3-state Outputs(三態(tài)輸出的1位-2位地址驅(qū)動器) |
| HD74ALVCH162831 | 1-bit 4-bit Address Register / Driver with 3-state Outputs(三態(tài)輸出的1位-4位地址寄存器/驅(qū)動器) |
| HD74ALVCH162835 | 18-bit Universal Bus Drivers with 3-state Outputs(三態(tài)輸出的18位通用總線驅(qū)動器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HD74ALVCH162825 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:18-bit Buffers / Drivers with 3-state Outputs |
| HD74ALVCH162827 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:20-bit Buffers / Drivers with 3-state Outputs |
| HD74ALVCH162830 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:1-bit to 2-bit Address Driver with 3-state Outputs |
| HD74ALVCH162831 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:1-bit 4-bit Address Register / Driver with 3-state Outputs |
| HD74ALVCH162832 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。