
HD66727
24
Table 11
Correspondence between Annunciator Display Addresses (AAN) and Driver Signals
AAN Address
Annunciator Segment Signals
Common
Signal
MSB
LSB D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
ASEG1
ASEG2
ASEG3
ASEG4
ACOM
0
0
0
0
Blink
Data
Blink
Data
Blink
Data
Blink
Data
ACOM
0
0
0
1
ASEG5
ASEG6
ASEG7
ASEG8
ACOM
0
0
0
1
Blink
Data
Blink
Data
Blink
Data
Blink
Data
ACOM
0
0
1
0
ASEG9
ASEG10
ASEG11
ASEG12
ACOM
0
Notes: 1. The annunciator is turned on when the corresponding even bit (data) is 1, and is turned off when
0.
2. The turned-on annunciator blinks when the corresponding odd bit (blink) is 1. Blinking is provided
by repeatedly turning on the annunciator for 32 frames and then turning it off for the next 32
frames.
0
1
0
Blink
Data
Blink
Data
Blink
Data
Blink
Data
ACOM
Table 12
Correspondence between LED Driving Port Addresses (AAN) and Driver Signals
AAN Address
LED Driving and General Output Port
MSB
LSB D7
D6
D5
D4
D3
D2
D1
D0
0
0
1
1
*
*
Port2
Port1
Port0
LED2
LED1
LED0
General output port
LED driving port
Notes: 1. The LED bits are inverted and output from each LED pin. If 0 is set, the V
CC
level is output from
the LED pin. If 1 is set, the GND level is output from the LED pin.
2. The port bits output from each port pin. If 0 is set, the GND level is output from the PORT pin. If
1 is set, the V
CC
level is output from the PORT pin.
3. Current cannot be driven for outputs of the V
CC
level in LED2–LED0 and the V
CC
and GND levels
in PORT2–PORT0.
4. The upper two bits (D7 and D6) are invalid.
Table 13
Correspondence between SEG/COM Addresses (AAN) and Driver Signals
AAN Address
Shift Direction of SEG/COM Driver
MSB
LSB D7
D6
D5
D4
D3
D2
D1
D0
0
Notes: 1. If CMS = 0, COM1/32 is the first line of the first column, and COM32/1 is the 8th line of the fourth
column. If CMS = 1, COM1/32 is the 8th line of the fourth column, and COM32/1 is the first line
of the first column. If CMS = 0, COMS1/2 is COMS1, and COMS2/1 is COM2.
2. If SGS = 0, SEG1/60 is SEG1 in the left of the display, and SEG60/1 is SEG60 in the right of the
display. If SGS = 1, the shift direction of the SEG is reversed.
3. The upper six bits (D7–D2) are invalid.
1
0
0
*
*
*
*
*
*
CMS
SGS