參數(shù)資料
型號: HD66522
廠商: Hitachi,Ltd.
英文描述: 160-Channel Column Driver with Internal Bit-Map RAM for Reflective Color Display and Grayscale Display(點陣圖形LCD160通道驅(qū)動器)
中文描述: 160通道,內(nèi)置欄位為反射式彩色顯示和灰度顯示屏(點陣圖形LCD160通道驅(qū)動器地圖RAM驅(qū)動器)
文件頁數(shù): 33/47頁
文件大?。?/td> 276K
代理商: HD66522
HD66522
33
Display Data Transfer
Display RAM data is transferred to 160-bit data latch circuit 1 at each falling edge of the CL1 clock pulse.
Since display data transfer and RAM access to draw data are completely asynchronous in the LSI, there
will be no draw data loss or display flickering due to display data transfertiming.
CL1
Address to the
internal RAM
Data latch circuit 1
Line counter
[n]
[n + 1]
[n + 1]
Address from MPU
Address from MPU
[n]th line
[n + 1]th line
Figure 24 Display Data Transfer
Draw Access
Random cycle
Random cycle sequence is the same as that for the general-purpose SRAM interface (Figures 25 and 26). It
can easily be connected to a CPU address bus and data bus.
DB7 to DB0 in
A16 to A0
DB7 to DB0 out
OE
WE
CS
Valid Dout
Figure 25 Read Cycle
DB7 to DB0 in
A16 to A0
DB7 to DB0 out
OE
WE
CS
Valid Din
Figure 26 Write Cycle
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