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| 型號： | HD4074459 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 4-bit HMCS400-Series microcomputer(4位單片微計算機) |
| 中文描述： | 4位HMCS400系列微機（4位單片微計算機） |
| 文件頁數(shù)： | 32/120頁 |
| 文件大小： | 692K |
| 代理商： | HD4074459 |
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HD404459 Series
32
Active mode
Watch mode
Active mode
Oscillation
stabilization period
Interrupt strobe
Inte, rupt, trobe
INT
,
WU
–
WU
0
Interrupt request
generation
(During the transition
from watch mode to
active mode only)
0
7
T
T
t
RC
Tx
T:
t :
Interrupt frame length
Oscillation stabilization period
T + < Tx < 2T +
t
t
RC
Figure 17 Interrupt Frame
Subactive Mode:
The OSC
1
and OSC
2
oscillator stops and the MCU operates with a clock generated by
the X1 and X2 oscillator. In this mode, functions other than the voltage comparator operate. However,
because the operating clock is slow, the power dissipation becomes low, next to watch mode.
The CPU instruction execution speed can be selected as 244
μ
s or 122
μ
s by setting bit 2 (SSR12) of the
system clock select register (SSR1: $029). Note that the SSR12 value must be changed in active mode. If
the value is changed in subactive mode, the MCU may malfunction.
When the STOP or SBY instruction is executed in subactive mode, the MCU enters either watch or active
mode, depending on the statuses of the low speed on flag (LSON: $020, bit 0) and the direct transfer on
flag (DTON: $020, bit 3).
Subactive mode is an optional function that the user must specify on the function option list.
Interrupt Frame:
In watch and subactive modes,
CLK
is applied to timer A and the
INT
0
and
WU
0
–
WU
7
circuits. Prescaler W and timer A operate as the time-base and generate the timing clock for the interrupt
frame. Three interrupt frame lengths (T) can be selected by setting the miscellaneous register (MIS: $00C)
(figure 18).
In watch and subactive modes, a timer A/
INT
0
wakeup interrupt is generated synchronously with the
interrupt frame. The interrupt request is generated synchronously with the interrupt strobe timing except
during transition to active mode. The falling edge of the
INT
0
and
WU
0
–
WU
7
signals is input asynchro-
nously with the interrupt frame timing, but it is regarded as input synchronously with the second interrupt
strobe clock after the falling edge. An overflow and interrupt request in timer A is generated synchronously
with the interrupt strobe timing.
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| HD4074459H | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:4-Bit Microcontroller |
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| HD4074608H | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:4-Bit Microcontroller |
| HD4074618 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4-Bit Single-Chip Microcomputer |
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