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參數(shù)資料
| 型號： | HCPMEM-512 |
| 廠商： | Hanbit Electronics Co.,Ltd. |
| 英文描述： | EDO DRAM Board 512Mbyte ( 32M x 144-Bit ) organized as 4Banks of 8Mx144, 4K Ref., 3.3V, ECC |
| 中文描述： | EDO公司的DRAM局512Mbyte（32M的× 144位）籌辦的8Mx144，4K的參考4Banks。，3.3伏，環(huán)境保護運動委員會 |
| 文件頁數(shù)： | 1/21頁 |
| 文件大?。?/td> | 819K |
| 代理商： | HCPMEM-512 |
HANBit HCPMEM-512
URL : www.hbe.co.kr 1
HANBit Electronics Co.,Ltd.
Rev. 1.0 (March, 2002)
GENERAL DESCRIPTION
The HCPMEM-512 is a 32M x 144 bit Dynamic RAM high-density module, organized with four banks of 8M x 144 bits.
The HCPMEM-512 consists of thirty six 8M x 16, 4K refresh DRAMs in TSOPII packages, five 16 bit buffer/drivers and one
PLD. The PLD controls the WRITE Enable and Output Enable signals to the DRAMS. Connectors on each side of the
module allow two memories to mated together.
FEATURES
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VTTL compatible inputs and outputs
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10 bit Column addressing
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Single 3.3V +/- .3 power supply
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Buffered Address and Control lines
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Mezzanine stackingAccess time: 60 ns (max)
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Power dissipation
* Active: 7.5 W (max)
* Standby : 400 mW (max) (CMOS interface)
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EDO page mode capability
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CAS-before-RAS refreshRefresh cycles
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FR4-PCB design
-
Application : Sun Microsystem CP 1400/1500
The used device is HM5113165F-6
EDO DRAM Board 512Mbyte ( 32M x 144-Bit ) organized as 4Banks of
8Mx144, 4K Ref., 3.3V, ECC Part No
.
HCPMEM-512
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