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參數(shù)資料
| 型號(hào)： | HCPL7820 |
| 元件分類： | 運(yùn)動(dòng)控制電子 |
| 英文描述： | High CMR Analog Isolation Amplifiers |
| 中文描述： | 高CMR模擬隔離放大器 |
| 文件頁數(shù)： | 14/15頁 |
| 文件大小： | 228K |
| 代理商： | HCPL7820 |
1-246
Figure 24. Pin 2 (V
IN+
) is con-
nected to the positive terminal of
the shunt resistor, while pin 3
(V
IN-
) is shorted to pin 4 (GND1),
with the power-supply return path
functioning as the sense line to
the negative terminal of the
current shunt. This allows a single
pair of wires or PC board traces
to connect the isolation amplifier
circuit to the shunt resistor. In
some applications, however,
supply currents flowing through
the power-supply return path may
cause offset or noise problems. In
this case, better performance may
be obtained by connecting pin 3
to the negative terminal of the
shunt resistor separately from the
power supply return path. When
connected this way, both input
pins should be bypassed. Whether
two or three wires are used, it is
recommended that twisted-pair
wire or very close PC board traces
be used to connect the current
shunt to the isolation amplifier
circuit to minimize electro-
magnetic interference to the
sense signal.
The 39
resistor in series with
the input lead forms a low-pass
anti-aliasing filter with the input
bypass capacitor with a 400 kHz
bandwidth. The resistor performs
another important function as
well; it dampens any ringing
which might be present in the
circuit formed by the shunt, the
input bypass capacitor, and the
wires or traces connecting the
two. Undamped ringing of the
input circuit near the input
sampling frequency can alias into
the baseband producing what
might appear to be noise at the
output of the device.
PC Board Layout
In addition to affecting offset, the
layout of the PC board can also
affect the common mode rejection
(CMR) performance of the
isolation amplifier, due primarily
to stray capacitive coupling
between the input and the output
circuits. To obtain optimal CMR
performance, the layout of the
minimize any stray coupling by
maintaining the maximum pos-
sible distance between the input
and output sides of the circuit and
ensuring that any ground plane on
the PCB does not pass directly
below or extend much wider than
the HCPL-7820/7825. Using
surface-mount components can
help achieve many of the PCB
objectives discussed in the pre-
ceding paragraphs. An example
through-hole PCB layout illustrat-
ing some of the more important
layout recommendations is shown
in Figures 26 and 27. See the
Application Note
Designing with
Hewlett-Packard Isolation
Amplifiers
for more information
on PCB layout considerations.
Figure 25. Single-Supply Post-Amplifier Circuit.
Figure 26. Top Layer of Printed Circuit Board Layout.
Figure 27. Bottom Layer of Printed Circuit Board Layout.
C3
C2
C4
R5
TO R
SENSE+
TO R
SENSE–
TO V
DD1
TO V
DD2
V
OUT+
V
OUT–
0.1 μF
+5 V
V
OUT
8
7
6
1
3
U2
5
2
4
R1
10.0 K
+5 V
C8
0.1 μF
–
+
MC34071
R3
10.0 K
HCPL-7820/7825
C4
R4B
20.0 K
C6
75 pF
U3
R4A
20.0 K
+5 V
C5
75 pF
R2
10.0 K
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| HCPL-7840#300 | 功能描述:隔離放大器 4.5 - 5.5 SV 8 dB RoHS:否 制造商:Texas Instruments 輸入補(bǔ)償電壓:1.5 mV 共模抑制比（最小值）:95 dB 帶寬:60 KHz 工作電源電壓:3.3 V 電源電流:8 mA 工作溫度范圍:- 40 C to + 105 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOP-8 封裝:Tube |
| HCPL-7840#360 | 功能描述:隔離放大器 4.5 - 5.5 SV 8 dB RoHS:否 制造商:Texas Instruments 輸入補(bǔ)償電壓:1.5 mV 共模抑制比（最小值）:95 dB 帶寬:60 KHz 工作電源電壓:3.3 V 電源電流:8 mA 工作溫度范圍:- 40 C to + 105 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOP-8 封裝:Tube |
| HCPL-7840#500 | 功能描述:隔離放大器 4.5 - 5.5 SV 8 dB RoHS:否 制造商:Texas Instruments 輸入補(bǔ)償電壓:1.5 mV 共模抑制比（最小值）:95 dB 帶寬:60 KHz 工作電源電壓:3.3 V 電源電流:8 mA 工作溫度范圍:- 40 C to + 105 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOP-8 封裝:Tube |
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