參數(shù)資料
型號(hào): HCPL0630
英文描述: Dual Channel, High CMR, High Speed, TTL Compatible Optocouplers 8 Pin DIP and SOIC-8
中文描述: 雙通道,高CMR,高速,TTL兼容光耦8引腳DIP和SOIC - 8
文件頁(yè)數(shù): 9/10頁(yè)
文件大小: 162K
代理商: HCPL0630
9
Propagation Delay,
Pulse-Width Distortion
and Propagation Delay
Skew
Propagation delay is a figure of
merit which describes how
quickly a logic signal propagates
through a system. The propaga-
tion delay from low to high
(t
PLH
) is the amount of time
required for an input signal to
propagate to the output, causing
the output to change from low to
high. Similarly, the propagation
delay from high to low (t
PHL
) is
the amount of time required for
the input signal to propagate to
the output, causing the output
to change from high to low (see
Figure 7).
Pulse-width distortion (PWD)
results when t
PLH
and t
PHL
differ
in value. PWD is defined as the
difference between t
PLH
and t
PHL
and often determines the
maximum data rate capability
of a transmission system. PWD
can be expressed in percent by
dividing the PWD (in ns) by the
minimum pulse width (in ns)
being transmitted. Typically,
PWD on the order of 20-30% of
the minimum pulse width is
tolerable; the exact figure
depends on the particular appli-
cation (RS232, RS422, T-1, etc.).
Propagation delay skew, t
PSK
, is
an important parameter to
consider in parallel data appli-
cations where synchronization
of signals on parallel data lines
is a concern. If the parallel data
is being sent through a group of
optocouplers, differences in
propagation delays will cause
the data to arrive at the outputs
of the optocouplers at different
times. If this difference in
propagation delays is large
enough, it will determine the
maximum rate at which parallel
data can be sent through the
optocouplers.
Propagation delay skew is
defined as the difference
between the minimum and
maximum propagation delays,
either t
PLH
or t
PHL
, for any given
V = 5.0 V
V = 0.6 V
6
3
-60
-20
20
60
100
T – TEMPERATURE –
°
C
2
80
40
0
-40
0
I
T
R = 350 K
1
4
5
R = 1 K
R = 4 K
Insulation R elated Specifications
DIP
Value
SOIC-8
Value
Parameter
Symbol
Units
Conditions
Min. External Air Gap
(Clearance)
L(IO1)
7
4
mm
Measured from input terminals
to output terminals
Min. External Tracking
Path (Creepage)
L(IO2)
7
4
mm
Measured from input terminals
to output tminals
Min. Internal Plastic
Gap (Clearance)
0.08
0.08
mm
Through insulation distance
conductor to conductor
Tracking Resistance
CTI
200
200
V
DIN IEC 112/VDE 0303 Part 1
Isolation Group
(per DIN VDE 0110)
IIIa
IIIa
Material group (DIN VDE 0110)
F igure 15. Input T hreshold Current
vs. T emperature.
F igure 16. R ecommended Printed Circuit Board L ayout.
GND BUS (BACK)
V BUS (FRONT)
CC
OUTPUT 1
OUTPUT 2
0.1
μ
F
10 mm MAX (SEE NOTE 1)
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參數(shù)描述
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HCPL-0630#500 功能描述:高速光耦合器 10MBd 2Ch 5mA RoHS:否 制造商:Avago Technologies 電流傳遞比: 最大波特率: 最大正向二極管電壓:1.75 V 最大反向二極管電壓:5 V 最大功率耗散:40 mW 最大工作溫度:+125 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-5 封裝:Tube
HCPL-0630-000E 功能描述:高速光耦合器 10MBd 2Ch 5mA RoHS:否 制造商:Avago Technologies 電流傳遞比: 最大波特率: 最大正向二極管電壓:1.75 V 最大反向二極管電壓:5 V 最大功率耗散:40 mW 最大工作溫度:+125 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-5 封裝:Tube
HCPL-0630-000E 制造商:Avago Technologies 功能描述:OPTOCOUPLER ROHS COMPLIANT:YES
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