參數(shù)資料
型號: HCPL-810J
英文描述: PLC Powerline DAA IC
中文描述: 集成電路的PLC電力線DAA
文件頁數(shù): 14/16頁
文件大?。?/td> 307K
代理商: HCPL-810J
14
To compensate for the
attenuation in the filter, the line
driver stage has 6 dB gain. To
prevent the line driver output
from saturating, it is therefore
important to achieve 6 dB of
attenuation between Tx-PD-out
(pin 13) and Tx-LD-in (pin 12)
either by the inherent filter
attenuation or by other means.
Transmitter Line Driver
The line driver is capable of
driving powerline load
impedances with output signals
up to 4 V
PP
. The internal
biasing of the line driver is
controlled externally via a
resistor R
ref
connected from pin
9 to GND2. The optimum
biasing point value for
modulation frequencies up to
150 kHz is 24 k
. For higher
frequency operation with
certain modulation schemes, it
may be necessary to reduce the
resistor value to enable
compliance with international
regulations.
The output of the line driver is
coupled onto the powerline
using a simple LC coupling
circuit as shown in Figure 20.
Refer to Table 1 for some
typical component values.
Capacitor C2 and inductor L1
attenuate the 50/60 Hz
powerline transmission
frequency. A suitable value for
L1 can range in value from 200
μ
H to 1 mH. To reduce the
series coupling impedance at
the modulation frequency, L2 is
included to compensate the
reactive impedance of C2. This
inductor should be a low
resistive type capable of meeting
the peak current requirements.
To meet many regulatory
requirements, capacitor C2
needs to be an X2 type. Since
these types of capacitors
typically have a very wide
tolerance range of 20%, it is
recommended to use as low Q
factor as possible for the L2/C2
combination. Using a high Q
coupling circuit will result in a
Figure 19. An example of a band-pass filter for transmit.
Figure 20. LC coupling network.
L3
Filter input
GND2
Filter output
R5
C3
GND2
Tx
Rx
X2
C2
N
L2
L1
L
1μF
wide tolerance on the overall
coupling impedance, causing
potential communication
difficulties with low powerline
impedances. Occasionally with
other circuit configurations, a
high Q coupling arrangement is
recommended, e.g., C2 less than
100 nF. In this case it is
normally used as a compromise
to filter out of band harmonics
originating from the line driver.
This is not required with the
HCPL-810J.
Although the series coupling
impedance is minimized to
reduce insertion loss, it has to
be sufficiently large to limit the
peak current to the desired
level in the worst expected
powerline load condition. The
peak output current is
effectively limited by the total
series coupling resistance,
which is made up of the series
resistance of L2, the series
resistance of the fuse and any
other resistive element
connected in the coupling
network.
To reduce power dissipation
when not operating in transmit
mode the line driver stage is
shut down to a low power high
impedance state by pulling the
Tx-en input (pin 1) to logic low
state. The high impedance
condition helps minimize
attenuation on received signals.
Table 1. Typical component values for band-pass filter and LC coupling network.
Carrier
Frequency (kHz)
Band-Pass Filter
LC Coupling
L3 (
μ
H)
C3 (nF)
L2 (
μ
H)
C2 (nF)
110
680
3.3
15
150
120
680
2.7
10
220
132
680
2.2
6.8
220
150
680
1.8
6.8
220
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