參數(shù)資料
型號(hào): HCF4029M013TR
廠商: 意法半導(dǎo)體
元件分類: 通用總線功能
英文描述: PRESETTABLE UP/DOWN COUNTER BINARY OR BCD DECADE
中文描述: 預(yù)置加/減計(jì)數(shù)器二元或BCD十年
文件頁數(shù): 8/12頁
文件大?。?/td> 485K
代理商: HCF4029M013TR
HCF4029B
8/12
(*) Typical temperature coefficient for all V
value is 0.3 %/°C.
(1) If more than one unit is cascated in the parallel clocked application t
should be made less than or equal to the sum of the fixed propagation
delay at 15pF and the transition time of the carry output driving stage for the estimated capacitance load.
(2) From Up/Down, Binary/Decade, Carry In or Preset Enable Control Inputs to Clock Edge.
(3) From Carry In to Clock Edge.
TEST CIRCUIT
C
L
= 50pF or equivalent (includes jig and probe capacitance)
R
L
= 200K
R
T
= Z
OUT
of pulse generator (typically 50
)
PRESET ENABLE
t
PHL
t
PLH
Propagation Delay Time
(Carry Output)
5
170
70
50
25
15
12
100
35
30
340
140
100
50
30
25
200
70
60
ns
10
15
5
10
15
5
10
15
t
setup(3)
Minimum Setup Time
(Carry In)
ns
t
hold
Minimum Hold Time
(Carry In)
ns
Symbol
Parameter
Test Condition
Value (*)
Unit
V
DD
(V)
Min.
Typ.
Max.
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