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參數(shù)資料
| 型號(hào)： | HCF4029M013TR |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | 通用總線功能 |
| 英文描述： | PRESETTABLE UP/DOWN COUNTER BINARY OR BCD DECADE |
| 中文描述： | 預(yù)置加/減計(jì)數(shù)器二元或BCD十年 |
| 文件頁數(shù)： | 2/12頁 |
| 文件大?。?/td> | 485K |
| 代理商： | HCF4029M013TR |
HCF4029B
2/12
signal is normally high and the counter reaches its
maximum count in the UP mode or the minimum
count in the DOWN mode provided the CARRY-IN
signal is low. The CARRY-IN signal in the low
state can thus be considered a CLOCK ENABLE.
The CARRY-IN terminal must be connected to
V
SS
when not in use. Binary counting is
accomplished when the BINARY/DECODE input
is high; the counter counts in the decade mode
when the BINARY/DECADE input is low. The
counter counts Up when to UP/DOWN INPUT is
high, and Down when the UP/DOWN INPUT is
low. Multiple packages can be connected in either
a
parallel
clocking
or
arrangement.
Parallel
synchronous control and, hence, a faster
response from all counting outputs. Ripple
clocking allows for longer clock input rise and fall
times.
a
clocking
ripple
clocking
provides
IINPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
FUNCTIONAL DIAGRAM
PIN No
SYMBOL
NAME AND FUNCTION
15
5
CLOCK
CARRY IN
BINARY/
DECADE
UP/DOWN
PRESET
ENABLE
JAM1 to JAM4 Jam Input Signals
Q1 to Q4
Q Outputs
CARRY OUT
Carry Out Outputs
V
SS
Negative Supply Voltage
V
DD
Positive Supply Voltage
Clock Input
Carry In Input
9
Binary / Decade Select
10
Up/Down Select
1
Preset Enable Input
4, 12, 13, 3
6, 11, 14, 2
7
8
16
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| HCF4030 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:QUAD EXCLUSIVE-OR GATE |
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