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參數(shù)資料
| 型號(hào)： | HCF4015M013TR |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | 通用總線功能 |
| 英文描述： | DUAL 4-STAGE STATIC SHIFT REGISTER WITH SERIAL INPUT/PARALLEL OUTPUT |
| 中文描述： | 雙4級(jí)靜態(tài)移位寄存器與串行輸入/并行輸出 |
| 文件頁(yè)數(shù)： | 5/10頁(yè) |
| 文件大?。?/td> | 225K |
| 代理商： | HCF4015M013TR |
HCF4015B
5/10
DYNAMIC ELECTRICAL CHARACTERISTICS
(T
amb
= 25°C, C
L
= 50pF, R
L
= 200K
, t
r
= t
f
= 20 ns)
(*) Typical temperature coefficient for all V
value is 0.3 %/°C.
(1) If more than one unit is cascaded in the parallel clocked application, t
CL should be made less than or equal to the sum of the fixed prop-
agation delay at 15 pF and the transmission time of the carry output driving stage of the estimated capacitive load.
Symbol
Parameter
Test Condition
Value (*)
Unit
V
DD
(V)
Min.
Typ.
Max.
CLOCKED OPERATION
t
PLH
t
PHL
Propagation Delay Time
(carry out or decoded out
lines)
5
160
80
60
100
50
40
6
12
17
90
40
25
320
160
120
200
100
80
ns
10
15
5
10
15
5
10
15
5
10
15
5
10
15
10
15
t
THL
t
TLH
Transition Time (carry out
or decoded out lines)
ns
f
CL
Maximum Clock Input
Frequency
3
6
MHz
8.5
180
80
50
t
W
Clock Pulse Width
ns
t
r
, t
f (1)
Clock Input Rise or Fall
Time
15
15
15
μ
s
t
setup
Data Setup Time
70
40
30
35
20
15
ns
RESET OPERATION
t
PLH,
t
PHL
Propagation Delay Time
5
200
100
80
100
40
30
400
200
160
ns
10
15
5
10
15
t
W
Reset Pulse Width
200
80
60
ns
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