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參數(shù)資料
| 型號： | HCF4015M013TR |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | 通用總線功能 |
| 英文描述： | DUAL 4-STAGE STATIC SHIFT REGISTER WITH SERIAL INPUT/PARALLEL OUTPUT |
| 中文描述： | 雙4級靜態(tài)移位寄存器與串行輸入/并行輸出 |
| 文件頁數(shù)： | 1/10頁 |
| 文件大?。?/td> | 225K |
| 代理商： | HCF4015M013TR |
1/10
September 2002
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MEDIUM SPEED OPERATION 12 MHz (Typ.)
CLOCK RATE AT V
DD
- V
SS
= 10V
FULLY STATIC OPERATION
8 MASTER-SLAVE FLIP-FLOPS PLUS
INPUT AND OUTPUT BUFFERING
HIGH NOISE IMMUNITY
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QUIESCENT CURRENT SPECIFIED UP TO
20V
5V, 10V AND 15V PARAMETRIC RATINGS
INPUT LEAKAGE CURRENT
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I
= 100nA (MAX) AT V
DD
= 18V T
A
= 25°C
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100% TESTED FOR QUIESCENT CURRENT
MEETS ALL REQUIREMENTS OF JEDEC
JESD13B "STANDARD SPECIFICATIONS
FOR DESCRIPTION OF B SERIES CMOS
DEVICES"
I
I
I
I
I
I
DESCRIPTION
HCF4015B is a monolithic integrated circuit
fabricated
in
Metal
technology available in DIP and SOP packages.
HCF4015B consists of two identical, independent,
4 stage serial-input/parallel-output registers.
Each register has independent CLOCK and
RESET inputs as well as a single serial DATA
input. "Q" outputs are available from each of the
Oxide
Semiconductor
four stages on both registers. All register stages
are D-TYPE, MASTER-SLAVE flip-flops. The
logic level present at the DATA input is transferred
into the first register stage and shifted over one
stage at each positive going clock transition. The
resetting of all stages is accomplished by a high
level on the reset line. It is possible to expand the
register to 8 stages using one HCF4015B
package and to expand to more than 8 stages by
using addition HCF4015Bs.
HCF4015B
DUAL 4-STAGE STATIC SHIFT REGISTER WITH
SERIAL INPUT/PARALLEL OUTPUT
PIN CONNECTION
ORDER CODES
PACKAGE
TUBE
T & R
DIP
SOP
HCF4015BEY
HCF4015BM1
HCF4015M013TR
DIP
SOP
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