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參數(shù)資料
| 型號： | HCD40C4344R |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 4-bit HMCS400-series microcomputer(4位單片微計算機) |
| 中文描述： | 4位HMCS400系列微電腦（4位單片微計算機） |
| 文件頁數(shù)： | 46/100頁 |
| 文件大小： | 610K |
| 代理商： | HCD40C4344R |
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HD404344R Series/HD404394 Series
46
R Port
The R port consists of input/output pins each addressed by 4 bits. Input/output is controlled by the LAR and
LBR instructions and the LRA and LRB instructions. The output data is stored in the port data register
(PDR) of each pin. The on/off status of the output buffers is controlled by the R-port data control registers
(DCR0–DCR3: $030–$033), which are mapped to memory addresses (figure 19).
The R1
0
–R1
2
ports of the HD404394 series are n-channel middle-voltage open drain input/output pins.
The R0
0
–R0
3
pins are also used as peripheral function pins:
SCK
, SI, SO, and TOC. Setting of the
peripheral functions for these pins is executed by bit 3 (SMR3) of the serial mode register (SMR:$005) and
by bits 2 to 0 (PMRA2–PMRA0) of port mode register A (PMRA: $004), as shown in figures 21 and 22.
The R3
0
–R3
3
pins of the HD404344R series and HD4074344 are also used as AN
0
–AN
3
peripheral function
pins. Pins R3
1
–R3
3
of the HD404394 series are also used as AN
1
–AN
3
peripheral function pins. The setting
of peripheral functions for these pins is executed by bits 3 to 0 (AMR13–AMR10) of A/D mode register 1
(AMR1: $019). For the HD404394 series, the use of AMR10 is prohibited (figure 23).
Bit
Initial value
Read/Write
Bit name
3
—
—
Not used
2
0
W
PMRA2
0
0
W
PMRA0
1
0
W
PMRA1
PMRA0
0
1
R0
2
/SO Mode Selection
R0
2
SO
Port mode register A (PMRA: $004)
PMRA1
0
1
R0
1
/SI Mode Selection
R0
1
SI
PMRA2
0
1
R0
3
/TOC Mode Selection
R0
3
TOC
Figure 21 Port Mode Register A (PMRA)
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