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參數資料
| 型號： | HCC4047B |
| 廠商： | 意法半導體 |
| 英文描述： | Dual Line Driver 14-SOIC 0 to 70 |
| 中文描述： | 低POWELOW功率單穩(wěn)態(tài)/非穩(wěn)態(tài)多諧振蕩器 |
| 文件頁數： | 8/15頁 |
| 文件大?。?/td> | 302K |
| 代理商： | HCC4047B |
V
TR
t
1
= – RC In
V
DD
+ V
TR
V
DD
– V
TR
2 V
DD
– V
TR
t
2
= – RC In
(V
TR
) (V
DD
– V
TR
)
t
A
= 2 (t
1
+ t
2
) = –2 RC In(V
DD
+ V
TR
) (2V
DD
– V
TR
)
ASTABLE MODE WAVEFORMS.
Typ : V
TR
= 0.5 V
DD
t
A
= 4.40 RC
Min : V
TR
= 0.33 V
DD
t
A
= 4.62 RC
Max : V
TR
= 0.67 V
DD
t
A
= 4.62 RC
thus if
ation will be(+ 5.0%, – 0.0%)
In addition tovariations from unit-to-unit, the astable
t
A
= 4.40 RC
isused, the maximum vari-
period mayvary as a function of frequency with re-
spect to V
DD
and temperature.
3 - MONOSTABLE MODE
The following analysis presents worst-case vari-
ationsfromunit-to-unit as afunction of transfer-volt-
age (V
TR
) shift (33% – 67% V
DD
) for one-shot
(monostable) operation.
V
TR
2 V
DD
V
DD
– V
TR
2 V
DD
– V
TR
t
1
= – RC In
t
2
= – RC In
(V
TR
) (V
DD
– V
TR
)
(2 V
DD
– V
TR
) (2 V
DD
)
t
M
= (t
1
+ t
2
) = – RC In
MONOSTABLEWAVEFORMS.
Where t
M
= monostable mode pulse width. Values
for t
M
areas follows :
Typ : V
TR
= 0.5
V
DD
t
M
= 2.48 RC
Min : V
TR
= 0.33 V
DD
t
M
= 2.71 RC
Max : V
TR
= 0.67 V
DD
t
M
= 2.48 RC
Thus if
t
M
=2.48 RC
is used, the maximum vari-
ation will be(+ 9.3%, – 0.0%).
Note : In the astable mode, the first positive half
cyclehasa duration of T
M
;succeeding dur-
ations are t
A
/2.
In addition to variations from unit to unit, the mono-
stable pulse width may vary as a function of fre-
quencywith respect to V
DD
and temperature.
4 - RETRIGGERMODE
The
HCC/HCF4047B
can be used in the retrigger
modetoextendtheoutput-pulse duration,ortocom-
parethe frequency of an input signal withthat ofthe
internal oscillator. In the retrigger mode the input
pulseisapplied toterminals8and12, andtheoutput
is taken from terminal 10 or 11. As shown in fig. A
normalmonostable action is obtained when one re-
trigger pulse is applied. Extended pulse duration is
obtained when more than one pulse is applied. For
two input pulses, t
RE
= t
1
’ + t
1
+ 2t
2
. For more than
two pulses, t
RE
(Q OUTPUT) terminates at some
variable time t
D
after the termination of the last re-
trigger pulse. t
D
is variable because t
RE
(Q OUT-
PUT) terminates after the second positive edge of
the oscillator output appears at flip-flop 4 (see logic
diagram).
HCC/HCF4047B
8/15
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