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參數(shù)資料
| 型號： | HCC4047B |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Dual Line Driver 14-SOIC 0 to 70 |
| 中文描述： | 低POWELOW功率單穩(wěn)態(tài)/非穩(wěn)態(tài)多諧振蕩器 |
| 文件頁數(shù)： | 7/15頁 |
| 文件大?。?/td> | 302K |
| 代理商： | HCC4047B |
Typical Output High (source) Current Charac-
teristics.
Minimum Output High (source) Current Charac-
teristics.
APPLICATION INFORMATION
1 - CIRCUITDESCRIPTION
Astableoperation is enabled by a highlevel on the
ASTABLE input. The period of the square wave at
the Q and Q Outputsin this mode of operation is a
function of the external components employed.
”True” inputpulses onthe ASTABLE input or ”Com-
plement”pulsesonthe ASTABLE inputallowthecir-
cuit to be used as a gatable multivibrator. The
OSCILLATORoutput period willbehalfof the Qter-
minal output in the astable mode. However, a 50%
duty cycle is not guaranteed at this output. In the
monostable mode, positive-edge triggering is ac-
complished by application of a leading-edge pulse
to the +TRIGGERinput and a lowlevelto the –TRI-
GGER input. For negative-edge triggering, a trail-
ing-edge pulse is applied to the –TRIGGER and a
highlevel is applied to the+TRIGGER.Input pulses
may be of any duration relative to the output pulse.
The multivibrator can be retriggered (on the leading
edge only) by applying a common pulse to both the
RETRIGGERand +TRIGGER inputs. In this mode
the output pulse remains high as long as the input
pulse period is shorter than the period determined
by theRC components. An external countdown op-
tion can be implemented by coupling ”Q” to an ex-
ternal”N” counter and resetting the counter with the
trigger pulse. The counter output pulse is fed back
to the ASTABLE input and has a duration equal to
N times the period of the multivibrator. A high level
on the EXTERNAL RESETinput assures no output
pulse during an ”O(jiān)N” power condition. This input
can also be activated to terminate the output pulse
at any time. In themonostable mode, a high-level or
power-on reset pulse, must be applied to the EX-
TERNALRESETwhenever V
DD
is applied.
2 - ASTABLE MODE
The following analysis presents worst-case vari-
ationsfromunit-to-unit as afunction of transfer-volt-
age (V
TR
) shift (33% – 67% V
DD
) for free-running
(astable) operation.
HCC/HCF4047B
7/15
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