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參數(shù)資料
| 型號： | HC55150CMZ |
| 廠商： | Intersil |
| 文件頁數(shù)： | 1/36頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SLIC UNIVERSAL LP 28-PLCC |
| 標準包裝： | 925 |
| 系列： | UniSLIC14 |
| 功能： | 用戶線路接口概念（SLIC） |
| 電路數(shù)： | 1 |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 電流 - 電源： | 2.25mA |
| 功率（瓦特）： | 2W |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-LCC（J 形引線） |
| 供應商設備封裝： | 28-PLCC（11.51x11.51） |
| 包裝： | 管件 |
| 包括： | 電池跟蹤抗削頂失真，回路和接地鍵檢測，振鈴控制 |
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1
FN4659.13
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2001, 2002, 2004-2006. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
HC55120, HC55121, HC55130, HC55140,
HC55142, HC55143, HC55150
Low Power UniSLIC14 Family
The UniSLIC14 is a family of Ultra Low Power SLICs. The
feature set and common pinouts of the UniSLIC14 family
positions it as a universal solution for: Plain Old Telephone
Service (POTS), PBX, Central Office, Loop Carrier, Fiber in
the Loop, ISDN-TA and NT1+, Pairgain and Wireless Local
Loop.
The UniSLIC14 family achieves its ultra low power operation
through: Its automatic single and dual battery selection (based
on line length) and battery tracking anti clipping to ensure the
maximum loop coverage on the lowest battery voltage. This
architecture is ideal for power critical applications such as
ISDN NT1+, Pairgain and Wireless local loop products.
The UniSLIC14 family has many user programmable features.
This family of SLICs delivers a low noise, low component
count solution for Central Office and Loop Carrier universal
voice grade designs. The product family integrates advanced
pulse metering, test and signaling capabilities, and zero
crossing ring control.
The UniSLIC14 family is designed in the Intersil “Latch” free
Bonded Wafer process. This process dielectrically isolates the
active circuitry to eliminate any leakage paths as found in our
competition’s JI process. This makes the UniSLIC14 family
compliant with “hot plug” requirements and operation in harsh
outdoor environments.
Features
Ultra Low Active Power (OHT) < 60mW
Single/Dual Battery Operation
Automatic Silent Battery Selection
Power Management/Shutdown
Battery Tracking Anti Clipping
Single 5V Supply with 3V Compatible Logic
Zero Crossing Ring Control
- Zero Voltage On/Zero Current Off
Tip/Ring Disconnect
Pulse Metering Capability
4 Wire Loopback
Programmable Current Feed
Programmable Resistive Feed
Programmable Loop Detect Threshold
Programmable On-Hook and Off-Hook Overheads
Programmable Overhead for Pulse Metering
Programmable Polarity Reversal Time
Selectable Transmit Gain 0dB/-6dB
2 Wire Impedance Set by Single Network
Loop and Ground Key Detectors
On-Hook Transmission
Common Pinout
Pb-Free Plus Anneal Available (RoHS Compliant)
HC55121
- Polarity Reversal
HC55130
- -63dB Longitudinal Balance
HC55140
- Polarity Reversal
- Ground Start
- Line Voltage Measurement
- 2 Wire Loopback
- -63dB Longitudinal Balance
HC55142
- Polarity Reversal
- Ground Start
- Line Voltage Measurement
-2.2VRMS Pulse Metering
- 2 Wire Loopback
HC55150
- Polarity Reversal
- Line Voltage Measurement
-2.2VRMS Pulse Metering
- 2 Wire Loopback
Related Literature
AN9871, User’s Guide for UniSLIC14 Eval Board
AN9903, UniSLIC14 and TI TCM38C17
RRLY
DT
DR
TIP
RING
VBH
VCC
RING AND TEST
RELAY DRIVERS
RING TRIP
DETECTOR
VBL
BGND
BATTERY
SELECTION
AND
BIAS
NETWORK
ZERO CURRENT
2-WIRE
INTERFACE
CROSSING
TRLY1
TRLY2
VTX
VRX
C1
C2
C3
GKD_LVM
ROH
RD
CDC
RDC_RAC
ZT
CH
LOOP CURRENT
DETECTOR
PTG
ILIM
STATE
DECODER
AND
DETECTOR
LOGIC
GKD/LOOP LENGTH
DETECTOR
RSYNC_REV
SHD
4-WIRE INTERFACE
VF SIGNAL PATH
LINE FEED
CONTROL
C4
C5
CRT_REV_LVM
POLARITY
REVERSAL
PULSE METERING
SPM
SIGNAL PATH
AGND
Block Diagram
Data Sheet
June 1, 2006
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