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| 型號： | HC55142IMZ96 |
| 廠商： | Intersil |
| 文件頁數(shù)： | 5/36頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SLIC UNIVERSAL LP 28-PLCC |
| 標準包裝： | 750 |
| 系列： | UniSLIC14 |
| 功能： | 用戶線路接口概念（SLIC） |
| 電路數(shù)： | 1 |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 電流 - 電源： | 2.25mA |
| 功率（瓦特）： | 1.5W |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-LCC（J 形引線） |
| 供應商設(shè)備封裝： | 28-PLCC（11.51x11.51） |
| 包裝： | 帶卷 (TR) |
| 包括： | 電池跟蹤抗削頂失真，回路和接地鍵檢測，振鈴控制 |
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13
FN4659.13
June 1, 2006
Notes
2. Overload Level (Two-Wire Port, Off Hook) - The overload
level is specified at the 2-wire port (VTR) with the signal source at
the 4-wire receive port (ERX). RL = 600, IDCMET ≥ 18mA.
Increase the amplitude of ERX until 1% THD is measured at VTR.
Reference Figure 1.
3. Overload Level (Two-Wire Port, On Hook) - The overload
level is specified at the 2-wire port (VTR) with the signal source at
the 4-wire receive port (ERX). RL = ∞, IDCMET = 0mA. Increase
the amplitude of ERX until 1% THD is measured at VTR.
Reference Figure 1.
4. Longitudinal Impedance - The longitudinal impedance is
computed using the following equations, where TIP and RING
voltages are referenced to ground. LZT, LZR, VT, VR, AR and
AT are defined in Figure 2.
(TIP) LZT = VT/AT
(RING) LZR = VR/AR
where: EL = 1VRMS (0Hz to 100Hz)
5. Longitudinal Current Limit (On-Hook Active) - On-Hook
longitudinal current limit is determined by increasing the (60Hz)
amplitude of EL (Figure 3A) until the 2-wire longitudinal current
is greater than 28mARMS/Wire. Under this condition, SHD pin
remains low (no false detection) and the 2-wire to 4-wire
longitudinal balance is verified to be greater than 45dB
(LB2-4 = 20log VTX/EL).
6. Longitudinal Current Limit (Off-Hook Active) - Off-Hook
longitudinal current limit is determined by increasing the (60Hz)
amplitude of EL (Figure 3B) until the 2-wire longitudinal current
is greater than 28mARMS/Wire. Under this condition, SHD pin
remains high (no false detection) and the 2-wire to 4-wire
longitudinal balance is verified to be greater than 45dB
(LB2-4 = 20log VTX/EL).
7. Longitudinal to Metallic Balance - The longitudinal to
metallic balance is computed using the following equation:
BLME = 20 log (EL/VTR), where: EL and VTR are defined in
Figure 4.
8. Metallic to Longitudinal FCC Part 68, Para 68.310 - The
metallic to longitudinal balance is defined in this spec.
9. Longitudinal to Four-Wire Balance - The longitudinal to 4-wire
balance is computed using the following equation:
BLFE = 20 log (EL/VTX), EL and VTX are defined in Figure 4.
10. Metallic to Longitudinal Balance - The metallic to longitudinal
balance is computed using the following equation:
BMLE = 20 log (ETR/VL), ERX = 0
where: ETR, VL and ERX are defined in Figure 5.
11. Four-Wire to Longitudinal Balance - The 4-wire to longitudinal
balance is computed using the following equation:
BFLE = 20 log (ERX/VL), ETR = source is removed.
where: ERX, VL and ETR are defined in Figure 5.
12. Two-Wire Return Loss - The 2-wire return loss is computed
using the following equation:
r = -20 log (2VM/VS) where: ZD = The desired impedance; e.g.,
the characteristic impedance of the line, nominally 600
.
(Reference Figure 6).
13. Overload Level (4-Wire Port Off-Hook) - The overload level
is specified at the 4-wire transmit port (VTX) with the signal
source (EG) at the 2-wire port, ZL = 20k, RL = 600
(Reference Figure 7). Increase the amplitude of EG until 1%
THD is measured at VTX. Note the PTG pin is open, and the
gain from the 2-wire port to the 4-wire port is equal to 1.
14. Overload Level (4-Wire Port On-Hook) - The overload level
is specified at the 4-wire transmit port (VTX) with the signal
source (EG) at the 2-wire port, ZL = 20k, RL = ∞ (Reference
Figure 7). Increase the amplitude of EG until 1% THD is
measured at VTX. Note the PTG pin is open, and the gain from
the 2-wire port to the 4-wire port is equal to 1.
15. Output Offset Voltage - The output offset voltage is specified
with the following conditions: EG = 0, RL = 600, ZL = ∞ and is
measured at VTX. EG, RL, VTX and ZL are defined in Figure 7.
16. Two-Wire to Four-Wire Frequency Response - The 2-wire to
4-wire frequency response is measured with respect to
EG = 0dBm at 1.0kHz, ERX = 0V (VRX input floating), RL = 600.
The frequency response is computed using the following equation:
F2-4 = 20 log (VTX/VTR), vary frequency from 300Hz to 3.4kHz
and compare to 1kHz reading.
VTX, VTR, RL and EG are defined in Figure 8.
17. Four-Wire to Two-Wire Frequency Response - The 4-wire to 2-
wire frequency response is measured with respect to ERX =0dBm
at 1.0kHz, EG source removed from circuit, RL = 600. The
frequency response is computed using the following equation:
F4-2 = 20 log (VTR/ERX), vary frequency from 300Hz to 3.4kHz
and compare to 1kHz reading.
VTR, RL and ERX are defined in Figure 8.
18. Four-Wire to Four-Wire Frequency Response - The 4-wire
to 4-wire frequency response is measured with respect to
ERX = 0dBm at 1.0kHz, EG source removed from circuit,
RL =600. The frequency response is computed using the
following equation:
F4-4 = 20 log (VTX/ERX), vary frequency from 300Hz to 3.4kHz
and compare to 1kHz reading.
VTX , RL and ERX are defined in Figure 8.
19. Two-Wire to Four-Wire Insertion Loss (PTG = Open) - The
2-wire to 4-wire insertion loss is measured with respect to
EG = 0dBm at 1.0kHz input signal, ERX = 0 (VRX input floating),
RL = 600 and is computed using the following equation:
L2-4 = 20 log (VTX/VTR)
where: VTX, VTR, RL and EG are defined in Figure 8. (Note:
The fuse resistors, RF, impact the insertion loss. The specified
insertion loss is for RF1 = RF2 = 0).
20. Two-Wire to Four-Wire Insertion Loss (PTG = AGND) - The
2-wire to 4-wire insertion loss is measured with respect to EG =
0dBm at 1.0kHz input signal, ERX = 0 (VRX input floating), RL =
600
and is computed using the following equation:
L2-4 = 20 log (VTX/VTR)
where: VTX, VTR, RL and EG are defined in Figure 8. (Note:
The fuse resistors, RF, impact the insertion loss. The specified
insertion loss is for RF1 = RF2 = 0).
21. Four-Wire to Two-Wire Insertion Loss - The 4-wire to 2-wire
insertion loss is measured based upon ERX = 0dBm, 1.0kHz
input signal, EG source removed from circuit, RL = 600 and is
computed using the following equation:
L4-2 = 20 log (VTR/ERX)
where: VTR, RL and ERX are defined in Figure 8.
22. Two-Wire to Four-Wire Gain Tracking - The 2-wire to 4-wire
gain tracking is referenced to measurements taken for
EG = -10dBm, 1.0kHz signal, ERX = 0 (VRX output floating),
RL = 600 and is computed using the following equation.
G2-4 = 20 log (VTX/VTR) vary amplitude -40dBm to +3dBm, or
-55dBm to -40dBm and compare to -10dBm reading.
VTX, RL and VTR are defined in Figure 8.
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