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參數(shù)資料
| 型號： | HC55130 |
| 廠商： | Intersil Corporation |
| 英文描述： | Ultra Low Power SLICs.(超低功耗用戶線路接口電路) |
| 中文描述： | 超低功耗SLIC組件。（超低功耗用戶線路接口電路） |
| 文件頁數(shù)： | 3/7頁 |
| 文件大小： | 83K |
| 代理商： | HC55130 |
4-3
Receive Gain (V
IN
to V
2W
)
4-wire to 2-wire gain is equal to the V
2W
divided by the input
voltage V
IN
, reference Figure 3. The gain through the
TCM38C17 is programmed to be 1.0 using Equation 13,
where V
IN
= V
PCMIN
= V
PWRO+
= V
RX
.
R
------------------------------
=
The input and output gain adjustments are discussed in detail
in PCM CODEC / Filter Combo Family: Device Design-in and
Application Data [1]. The maximum output (Gain =1) can be
obtained by maximizing R
1
and minimizing R
2
(Figure 2). This
can be done by letting R
1
= infinity and R
2
= 0, as shown in
Figure 3.
The receive gain is calculated using Equation 12 and the
relationship Z
T
= 200(Z
TR
-2R
P
).
Equation 14 expresses the receive gain (V
IN
to V
2W
) in
terms of network impedances.
V
IN
Notice that the phase of the 4-wire to 2-wire signal is 180
o
out of phase with the input signal.
Transmit Gain Across UniSLIC14
(E
G
to V
TX
)
The 2-wire to 4-wire gain is equal to V
TX
/E
G
with V
RX
= 0,
reference Figure 2.
From Equation 9 with V
RX
= 0
(
–
=
Substituting Equation 16 into Equation 15 and simplifying.
By design, V
TX
= -V
TR
, therefore,
(
M
L
A more useful form of the equation is rewritten in terms of
V
TX
/V
2W
. A voltage divider equation is written to convert
from E
G
to V
2W
as shown in Equation 19.
Z
TR
Rearranging Equation 19 in terms of E
G
, and substituting
into Equation 18 results in an equation for 2-wire to 4-wire
gain that’s a function of the synthesized input impedance of
the SLIC and the protection resistors (Z
TR
).
V
2W
Notice that the phase of the 2-wire to 4-wire signal is in
phase with the input signal and that the gain will always be
less than one because of the protection resistors.
Transmit Gain Across the System
(V
2W
to V
PCMOUT
)
2-wire to 4-wire gain is equal to the V
PCMOUT
voltage
divided by the 2-wire voltage V
2W
, reference Figure 3.
V
2W
V
PCMOUT
is only a function of V
TX
and the feedback
resistors R
a1
and R
f
Equation 22. This is because V
IN
is
considered ground for this analysis, thereby effectively
grounding the V
PWRO+
output.
G
PCMIN
(
PWRO
–
+
)
R
1
4
+
4 R
2
------
+
(EQ. 13)
G
4-2
=
-----------
= -2
Z
O
TR
--------------------------
2
Z
T
Z
O
---------
2R
P
+
+
-----------------------------------------------
–
=
(EQ. 14)
E
–
G
Z
L
I
M
2R
P
I
M
V
TR
–
+
+
0
=
Loop Equation
(EQ. 15)
V
TR
I
M
Z
TR
2R
P
–
)
(EQ. 16)
E
G
I
M
Z
L
Z
TR
+
(
)
=
(EQ. 17)
G
2-4
=
V
G
----------
=
I
Z
2R
TR
–
)
)
-------------------+
Z
L
2R
TR
–
(
-----------+
)
)
=
(EQ. 18)
V
2W
=
L
-------------+
E
G
(EQ. 19)
G
2-4
=
-----------
=
Z
- 2R
P
TR
-----------------------------
Z
- 2R
P
0
------------------------
=
(EQ. 20)
G
2
4
–
----------------------------
=
(EQ. 21)
FIGURE 3. RECEIVE GAIN G(4-2), TRANSMIT GAIN (2-4) AND TRANSHYBRID BALANCE
TIP
RING
INTERSIL
UniSLIC14
V
RX
V
TX
R
P
30
R
P
30
Z
O
PWRO+
V
2W
-
+
ANLGIN+
ANLGIN-
R
a2
TEXAS
V
IN
PCMIN
PCMOUT
AREF
+
-
+
-
+
-
GSR
PWRO-
1
+
-
V
TX
′
+
-
PTG
FLOATING
R
a1
R
f
Z
T
Z
T
INSTRUMENTS
TCM38C17
Application Note 9903
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HC55130IB | 制造商:Rochester Electronics LLC 功能描述:LOW PWR SLIC,63DB BALANCE - Bulk |
| HC55130IB96 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Low Power Universal SLIC Family |
| HC55130IBZ | 功能描述:電信線路管理 IC LW PWR SLIC 63DB BALANCE RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| HC55130IBZ96 | 功能描述:電信線路管理 IC LW PWR SLIC 63DB BALANCE RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| HC55130IM | 制造商:Rochester Electronics LLC 功能描述:LOW PWR SLIC,63DB BALANCE - Bulk 制造商:Harris Corporation 功能描述: |
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