
4-2
The AC loop current required to satisfy this condition is given
in Equation 2.
The current calculated in Equation 2 is used as feedback to
match the impedance of the SLIC and both protection and
sense resistors to the load Z
0.
The output voltage of the SLIC (V
TX
) is defined by design
and given in Equation 3.
Substituting for
I
L
from Equation 2 into Equation 3 results in
the voltage at the V
TX
output that will be used to generate
the required feedback.
By design, V
TR
is equal to 2 times the voltage at the receive
input (R
X
) Figure 2.
Substituting Equation 5 into Equation 4.
Solving Equation 6 for the voltage at V
RX
as a function of
V
TX
(when matching the Z
SLIC
, the two protection resistors
(R
P
) and the two sense resistors (R
S
) to the load Z
O
) is
given in Equation 7.
Equation 7 is the gain of the feedback circuit (output/input =
V
RX
/V
TX
) used to match the impedance of the SLIC and
both protection and sense resistors. Note: In Equation 7 it
seemed logical to simplify the numerator by trying to
combine Z
0
and the two subsequent terms together. In
practice however, the impedance of the network you want to
match (Z
0
) cannot easily have 2*R
p
and 2*R
s
subtracted
from it since the sum of these resistors is often larger than
the value of the series resistance of the complex network.
Equation 7 is therefore rewritten in Equation 8.
Analysis of Equation 8 yields a 2 OpAmp feedback network.
The first term has Z
O
and no phase inversion. This requires
the path to flow through 2 opamps and makes the matching
of different complex loads easy. (i.e., can set Z
O
in feedback
network equal to the Z
O
you want to match). The second
term has a phase inversion and requires only one OpAmp in
the feedback path.
Figure 2 shows the circuit required to achieve matching of
the SLIC’s impedance to the load Z
O
. The voltage at V
RX
is
a function of V
TX
, V
GSX
(V
TX
R
ZO1/
R
a2
) and V
IN
.
The voltage at V
RX
is determined via superposition. The circuit
equation for the feedback network is given in Equation 9.
For impedance matching of the two wire side, we set V
IN
equal to zero. This reduces Equation 9 to that shown in
Equation 10.
To achieve the desired matching of the circuit to the line
impedance Z
O
, we set our design Equation 8 equal to our
circuit Equation 10. By inspection of the correct phase in
Equations 8 and 10, we have Equations 11 and 12.
Given: R
f
= R, R
a3
= 2
R
, R
ZO1
= Z
O
Note: by making R
a3
=
2
Rf
, the value of R
a2
becomes 4R
S
(Equation 13). This
results in the 2-wire to 4-wire gain being equal to 1 (Equation
24 and Equation 25)
From Equation 11.
From Equation 12.
I
L
V
P
0
2
R
S
×
–
)
-----------–
at matching
=
(EQ. 2)
V
TX
4R
S
I
L
=
(EQ. 3)
V
TX
4R
V
×
0
P
2
R
S
×
)
---------–
=
(EQ. 4)
(EQ. 5)
V
TR
= 2 x V
RX
V
TX
4R
2
V
RX
2
×
×
0
R
P
R
S
×
–
×
)
---------–
=
(EQ. 6)
(EQ. 7)
V
TX
-----------
Z
---------------------------------------------------------
2
R
2
R
×
–
×
–
(
)
S
=
V
TX
-----------
Z
S
-----------------
2
------------------------------------
R
R
+
(
)
×
S
–
=
(EQ. 8)
V
RX
V
–
TX
R
f
a1
----------
V
R
Rf
a2
a3
---------------------------------
V
R
f
a4
---------------
–
+
=
(EQ. 9)
V
RX
V
–
TX
R
f
a1
----------
V
R
Rf
a2
a3
---------------------------------
+
=
(EQ. 10)
Z
S
-----------------
R
Rf
a2
a3
---------------------
=
(EQ. 11)
2
------------------------------------
R
R
+
(
)
×
S
R
f
a1
----------
=
(EQ. 12)
R
a2
4R
S
=
(EQ. 13)
R
a1
R
P
4R
S
R
S
×
+
---------------------
=
(EQ. 14)
Application Note 9872