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參數(shù)資料
| 型號： | HB7121BELECTRONICS |
| 廠商： | Hynix Semiconductor Inc. |
| 英文描述： | CMOS IMAGE SENSOR With 8-bit ADC |
| 中文描述： | CMOS圖像傳感器的8位ADC |
| 文件頁數(shù)： | 8/29頁 |
| 文件大小： | 391K |
| 代理商： | HB7121BELECTRONICS |
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HB7121B
Semiconductor Inc.
System IC SBU
CMOS IMAGE SENSOR
With 8-bit ADC
This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume
any responsibility for use of circuits described. NO patent licenses are implied.
DA21000601R_1.0 - 8 - 2001 Hnix System IC SBU
PIN DESCRIPTIONS (48 Pin CLCC)
PIN
NAME
1
SCK
2
DGND
3
ENB
4
DGND
5
MCLK
6
VDD5
7
AVDD
8
AGND
9 ~ 16
17
AGND
18
AVDD
19, 20
Reserved
21
DGND
22
DATA7
23
DATA6
24
DATA5
25
DATA4
26
DGND
27
DATA3
28
DATA2
29
DATA1
30
DATA0
31
DVDD
32
DGND
33 ~ 41
42
DVDD
43
RESET
44
VSYNC
45
HSYNC
/DVALID
46
DGND
47
SDA
48
DGND
I/O
I
I
I
I
I
I
I
I
I
I
I
O
O
O Image Data bit 5
O
Image Data bit 4
I
Digital Ground
O
Image Data bit 3
O
Image Data bit 2
O
Image Data bit 1
O
Image Data bit 0
I
Digital Supply Voltage 3.3V
I
Digital Ground
No Connection
I
Digital Supply Voltage 3.3V
I
Hardware Reset Signal, Active Low
O
Vertical synchronization signal / Frame start output
; Signal pulse at start of image data frame with programmable
blanking duration
O
Horizontal synchronization signal / Data valid output
; Data valid when 'H' with programmable blanking duration
I
Digital Ground
I/O
I
2
C Data ; I
2
C standard data I/O port
I
Digital Ground
DESCRIPTION
I
2
C Clock ; I
2
C clock control from I
2
C master
Digital Ground
Sensor Enable Signal ; 'H' enable normal operation
'L' disable sensor
Digital Ground
Master Clock (up to 15MHz)
; Global master clock for image sensor internal timing control
I/O bias voltage for 5V tolerant *1)
Analog Supply Voltage 3.3V
Analog Ground
No Connection
Analog Ground
Analog Supply Voltage 3.3V
Reserved
Digital Ground
Image Data bit 7
Image Data bit 6
N.C
N.C
*1) Tie to DVDD for 3.3V operation / Tie to 5V for 5V tolerant operation
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