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參數(shù)資料
| 型號： | HB54A2568KN-A75B |
| 廠商： | ELPIDA MEMORY INC |
| 元件分類： | DRAM |
| 英文描述： | 256MB DDR SDRAM S.O.DIMM |
| 中文描述： | 32M X 64 DDR DRAM MODULE, 0.75 ns, DMA200 |
| 封裝： | SODIMM-200 |
| 文件頁數(shù)： | 1/16頁 |
| 文件大?。?/td> | 514K |
| 代理商： | HB54A2568KN-A75B |
Document No. E0148H20 (Ver. 2.0)
Date Published April 2002 (K) Japan
URL: http://www.elpida.com
Elpida Memory, Inc. 2001-2002
Hitachi, Ltd. 2001
Elpida Memory, Inc. is a joint venture DRAM company of NEC Corporation and Hitachi, Ltd.
PRELIMINARY DATA SHEET
256MB DDR SDRAM S.O.DIMM
HB54A2568KN-A75B/B75B/10B
(32M words
×
64 bits, 2 Banks)
Description
The HB54A2568KN is Double Data Rate (DDR)
SDRAM Module, mounted 256M bits DDR SDRAM
(HM5425161BTT) sealed in TSOP package, and 1
piece of serial EEPROM (2k bits EEPROM) for
Presence Detect (PD). The HB54A2568KN is
organized as 16M
×
64
×
2 bank mounted 8 pieces of
256M bits DDR SDRAM. Read and write operations
are performed at the cross points of the CK and the
/CK. This high-speed data transfer is realized by the 2
bits prefetch-pipelined architecture. Data strobe (DQS)
both for read and write are available for high speed and
reliable data bus design. By setting extended mode
register, the on-chip Delay Locked Loop (DLL) can be
set enable or disable. An outline of the products is
200-pin socket type package (dual lead out).
Therefore, it makes high density mounting possible
without surface mount technology. It provides common
data inputs and outputs. Decoupling capacitors are
mounted beside each TSOP on the module board.
Features
200-pin socket type package (dual lead out)
Outline: 67.6mm (Length)
×
31.75mm (Height)
×
3.80mm (Thickness)
Lead pitch: 0.6mm
2.5V power supply (VCC)
SSTL-2 interface for all inputs and outputs
Clock frequency: 133 MHz (max) (-A75B/B75B)
: 100 MHz (max) (-10B)
Data inputs, outputs and DM are synchronized with
DQS
4 banks can operate simultaneously and
independently (Component)
Burst read/write operation
Programmable burst length: 2, 4, 8
Burst read stop capability
Programmable burst sequence
Sequential
Interleave
Start addressing capability
Even and Odd
Programmable /CAS latency (CL): 2, 2.5
8192 refresh cycles: 7.8
μ
s (8192row /64ms)
2 variations of refresh
Auto refresh
Self refresh
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HB54A2568KN-B75B | 256MB DDR SDRAM S.O.DIMM |
| HB54A5129F1U-B75B | 512MB Registered DDR SDRAM DIMM |
| HB54A5129F1U | 512MB Registered DDR SDRAM DIMM |
| HB54A5129F1U-10B | 512MB Registered DDR SDRAM DIMM |
| HB54A5129F1U-A75B | 512MB Registered DDR SDRAM DIMM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HB54A2568KN-B75B | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256MB DDR SDRAM S.O.DIMM |
| HB54A2569F1 | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256MB, 512MB Registered DDR SDRAM DIMM |
| HB54A2569F1-10B | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256MB, 512MB Registered DDR SDRAM DIMM |
| HB54A2569F1-A75B | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256MB, 512MB Registered DDR SDRAM DIMM |
| HB54A2569F1-B75B | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256MB, 512MB Registered DDR SDRAM DIMM |
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