參數(shù)資料
型號: HB52E649E12-A6B
廠商: ELPIDA MEMORY INC
元件分類: DRAM
英文描述: 512 MB Registered SDRAM DIMM 64-Mword 】 72-bit, 100 MHz Memory Bus, 1-Bank Module (18 pcs of 64 M 】 4 Components) PC100 SDRAM
中文描述: 64M X 72 SYNCHRONOUS DRAM MODULE, 6.9 ns, DMA168
封裝: DIMM-168
文件頁數(shù): 10/16頁
文件大?。?/td> 147K
代理商: HB52E649E12-A6B
HB52E649E12-A6B/B6B
Data Sheet E0020H20
10
DC Characteristics
(Ta = 0 to 55
°
C, V
CC
= 3.3 V ± 0.3 V, V
SS
= 0 V)
HB52E649E12
-A6B
-B6B
Parameter
Symbol
Min
Max
Min
Max
Unit
Test conditions
Notes
Operating current
(
CE
latency = 3)
(
CE
latency = 4)
I
CC1
I
CC1
I
CC2P
2220
mA
Burst length = 1
t
RC
= min
1, 2, 3
2220
2220
mA
Standby current in power
down
564
564
mA
CKE = V
IL
, t
CK
= 12
ns
6
Standby current in power
down (input signal stable)
I
CC2PS
546
546
mA
CKE = V
IL
, t
CK
=
7
Standby current in non
power down
I
CC2N
870
870
mA
CKE,
S
= V
IH
,
t
CK
= 12 ns
CKE = V
IL
, t
CK
= 12
ns
CKE,
S
= V
IH
,
t
CK
= 12 ns
t
CK
= min, BL = 4
4
Active standby current in
power down
I
CC3P
582
582
mA
1, 2, 6
Active standby current in
non power down
I
CC3N
1050
1050
mA
1, 2, 4
Burst operating current
(
CE
latency = 3)
(
CE
latency = 4)
I
CC4
I
CC4
I
CC5
I
CC6
2220
mA
1, 2, 5
2220
2220
mA
Refresh current
4470
4470
mA
Self refresh current
564
564
mA
V
IH
V
0.2 V
V
IL
0.2 V
0
Vin
V
CC
0
Vout
V
CC
DQ = disable
8
Input leakage current
I
LI
I
LO
10
10
10
10
μA
Output leakage current
10
10
10
10
μA
Output high voltage
V
OH
V
OL
2.4
2.4
V
I
OH
=
4 mA
I
OL
= 4 mA
Output low voltage
Notes: 1. I
depends on output load condition when the device is selected. I
CC
(max) is specified at the
output open condition.
2. One bank operation.
3. Input signals are changed once per one clock.
4. Input signals are changed once per two clocks.
5. Input signals are changed once per four clocks.
6. After power down mode, CK operating current.
7. After power down mode, no CK operating current.
8. After self refresh mode set, self refresh current.
0.4
0.4
V
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